| Line 1... |
Line 1... |
| 1 |
/************ SMB driver ************/ |
1 |
/************ SMB driver ************/ |
| 2 |
|
2 |
|
| 3 |
#define SA 0x00 // Slave Address (0 for single slave / 0x5A<<1 default) |
3 |
#define SA 0x00 // Slave Address (0 for single slave / 0x5A<<1 default) |
| 4 |
#define RAM_Access 0x00 // RAM access command |
4 |
#define RAM_Access 0x00 // RAM access command |
| 5 |
#define RAM_Tobj1 0x07 // To1 address in the RAM |
5 |
#define RAM_Tobj1 0x07 // To1 address in the RAM |
| - |
|
6 |
#define RAM_Tobj2 0x08 // To2 address in the RAM |
| 6 |
#define RAM_Tamb 0x06 // Ta address in the RAM |
7 |
#define RAM_Tamb 0x06 // Ta address in the RAM |
| 7 |
|
8 |
|
| 8 |
|
9 |
|
| 9 |
// High and Low level of clock |
10 |
// High and Low level of clock |
| 10 |
#define HIGHLEV 40 // max. 50us |
11 |
#define HIGHLEV 40 // max. 50us |