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void TDC_init() |
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void TDC_init() |
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{ |
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{ |
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x70); |
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spi_xfer(TDC_stream,0x70); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_reset() |
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void TDC_reset() |
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{ |
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{ |
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x50); |
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spi_xfer(TDC_stream,0x50); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_start_cycle() |
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void TDC_start_cycle() |
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{ |
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{ |
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x01); |
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spi_xfer(TDC_stream,0x01); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_start_temp() |
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void TDC_start_temp() |
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{ |
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{ |
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x02); |
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spi_xfer(TDC_stream,0x02); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_start_cal_resonator() |
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void TDC_start_cal_resonator() |
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{ |
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{ |
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x03); |
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spi_xfer(TDC_stream,0x03); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_start_cal() |
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void TDC_start_cal() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0x04); |
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spi_xfer(TDC_stream,0x04); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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unsigned int32 TDC_get_measurement(int num) |
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unsigned int32 TDC_get_measurement(int num) |
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{ |
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{ |
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|
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unsigned int32 ret; |
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|
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|
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB0 + num - 1); |
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spi_xfer(TDC_stream,0xB0 + num - 1); |
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return spi_xfer(TDC_stream,0,32); |
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ret=spi_xfer(TDC_stream,0,32); |
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output_high(TDC_ENABLE); |
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return ret; |
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} |
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} |
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|
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|
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unsigned int16 TDC_get_status() |
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unsigned int16 TDC_get_status() |
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{ |
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{ |
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|
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unsigned int16 ret; |
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|
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB4); |
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spi_xfer(TDC_stream,0xB4,8); |
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return spi_xfer(TDC_stream,0,16); |
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ret=spi_xfer(TDC_stream,0,16); |
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output_high(TDC_ENABLE); |
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return ret; |
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} |
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} |
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|
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|
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unsigned int8 TDC_get_reg1() |
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unsigned int8 TDC_get_reg1() |
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{ |
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{ |
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|
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unsigned int8 ret; |
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|
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|
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB5); |
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spi_xfer(TDC_stream,0xB5,8); |
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return spi_xfer(TDC_stream,0,8); |
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ret=spi_xfer(TDC_stream,0,8); |
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output_high(TDC_ENABLE); |
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return ret; |
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} |
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} |
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|
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|
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void TDC_setup_reg1() |
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void TDC_setup_reg1() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB0); |
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spi_xfer(TDC_stream,0x81,8); |
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spi_xfer(TDC_stream,0x224000,24); |
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_setup_reg2() |
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void TDC_setup_reg2() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB1); |
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spi_xfer(TDC_stream,0xB1); |
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_setup_reg3() |
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void TDC_setup_reg3() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB2); |
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spi_xfer(TDC_stream,0xB2); |
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_setup_reg4() |
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void TDC_setup_reg4() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB3); |
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spi_xfer(TDC_stream,0xB3); |
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output_high(TDC_ENABLE); |
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} |
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} |
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|
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|
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void TDC_setup_reg5() |
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void TDC_setup_reg5() |
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{ |
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{ |
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output_low(TDC_ENABLE); |
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spi_xfer(TDC_stream,0xB4); |
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spi_xfer(TDC_stream,0xB4); |
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|
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output_high(TDC_ENABLE); |
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} |
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} |