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16 | //************************************************************************ |
16 | //************************************************************************ |
17 | |
17 | |
18 | #define SDI PB3 |
18 | #define SDI PB3 |
19 | #define SDI_PORT PORTB |
19 | #define SDI_PORT PORTB |
20 | #define SDI_DDR DDRB |
20 | #define SDI_DDR DDRB |
21 | |
21 | |
22 | #define FSK PC1 |
- | |
23 | #define FSK_PORT PORTC |
- | |
24 | #define FSK_DDR DDRC |
- | |
25 | |
- | |
26 | #define SDO PB4 // input for mega |
22 | #define SDO PB4 // input for mega |
27 | #define SDO_PORT PORTB |
23 | #define SDO_PORT PORTB |
28 | #define SDO_DDR DDRB |
24 | #define SDO_DDR DDRB |
29 | #define SDO_PIN PINB |
25 | #define SDO_PIN PINB |
30 | |
26 | |
31 | #define SCK PB5 |
27 | #define SCK PB5 |
32 | #define SCK_PORT PORTB |
28 | #define SCK_PORT PORTB |
33 | #define SCK_DDR DDRB |
29 | #define SCK_DDR DDRB |
34 | |
30 | |