Line 46... |
Line 46... |
46 |
// Condition. After this period, the first clock is generated. |
46 |
// Condition. After this period, the first clock is generated. |
47 |
//(Thd:sta=4.0us min) |
47 |
//(Thd:sta=4.0us min) |
48 |
mSCL_LOW(); // Clear SCL line |
48 |
mSCL_LOW(); // Clear SCL line |
49 |
// enable_interrupts(GLOBAL); |
49 |
// enable_interrupts(GLOBAL); |
50 |
delay_us( TBUF ); // Wait a few microseconds |
50 |
delay_us( TBUF ); // Wait a few microseconds |
51 |
|
- |
|
52 |
toggle_dome(); |
- |
|
53 |
} |
51 |
} |
54 |
//********************************************************************************************* |
52 |
//********************************************************************************************* |
55 |
// STOP CONDITION ON SMBus |
53 |
// STOP CONDITION ON SMBus |
56 |
//********************************************************************************************* |
54 |
//********************************************************************************************* |
57 |
//Name: STOPbit |
55 |
//Name: STOPbit |
Line 71... |
Line 69... |
71 |
delay_us( TBUF ); // Wait a few microseconds |
69 |
delay_us( TBUF ); // Wait a few microseconds |
72 |
mSCL_HIGH(); // Set SCL line |
70 |
mSCL_HIGH(); // Set SCL line |
73 |
delay_us( TBUF ); // Stop condition setup time(Tsu:sto=4.0us min) |
71 |
delay_us( TBUF ); // Stop condition setup time(Tsu:sto=4.0us min) |
74 |
mSDA_HIGH(); // Set SDA line |
72 |
mSDA_HIGH(); // Set SDA line |
75 |
// enable_interrupts(GLOBAL); |
73 |
// enable_interrupts(GLOBAL); |
76 |
|
- |
|
77 |
toggle_dome(); |
- |
|
78 |
} |
74 |
} |
79 |
|
75 |
|
80 |
|
76 |
|
81 |
void SMB_send_bit(unsigned char bit_out) |
77 |
void SMB_send_bit(unsigned char bit_out) |
82 |
{ |
78 |
{ |
Line 85... |
Line 81... |
85 |
else {mSDA_HIGH();} |
81 |
else {mSDA_HIGH();} |
86 |
delay_us(3); |
82 |
delay_us(3); |
87 |
mSCL_HIGH(); // Set SCL line |
83 |
mSCL_HIGH(); // Set SCL line |
88 |
delay_us( HIGHLEV ); // High Level of Clock Pulse |
84 |
delay_us( HIGHLEV ); // High Level of Clock Pulse |
89 |
mSCL_LOW(); // Clear SCL line |
85 |
mSCL_LOW(); // Clear SCL line |
- |
|
86 |
|
- |
|
87 |
toggle_dome(); |
- |
|
88 |
|
90 |
delay_us( LOWLEV ); // Low Level of Clock Pulse |
89 |
delay_us( LOWLEV ); // Low Level of Clock Pulse |
91 |
// mSDA_HIGH(); // Master release SDA line , |
90 |
// mSDA_HIGH(); // Master release SDA line , |
92 |
// enable_interrupts(GLOBAL); |
91 |
// enable_interrupts(GLOBAL); |
93 |
|
92 |
|
94 |
toggle_dome(); |
93 |
toggle_dome(); |
95 |
return; |
94 |
return; |
96 |
} |
95 |
} |
97 |
|
96 |
|
98 |
unsigned char SMB_Receive_bit(void) |
97 |
unsigned char SMB_Receive_bit(void) |
99 |
{ |
98 |
{ |
Line 104... |
Line 103... |
104 |
mSCL_HIGH(); // Set SCL line |
103 |
mSCL_HIGH(); // Set SCL line |
105 |
delay_us( HIGHLEV ); // High Level of Clock Pulse |
104 |
delay_us( HIGHLEV ); // High Level of Clock Pulse |
106 |
if(input(SDA)) Ack_bit=1; // \ Read acknowledgment bit, save it in Ack_bit |
105 |
if(input(SDA)) Ack_bit=1; // \ Read acknowledgment bit, save it in Ack_bit |
107 |
else Ack_bit=0; // / |
106 |
else Ack_bit=0; // / |
108 |
mSCL_LOW(); // Clear SCL line |
107 |
mSCL_LOW(); // Clear SCL line |
- |
|
108 |
|
- |
|
109 |
toggle_dome(); |
- |
|
110 |
|
109 |
delay_us( LOWLEV ); // Low Level of Clock Pulse |
111 |
delay_us( LOWLEV ); // Low Level of Clock Pulse |
110 |
// enable_interrupts(GLOBAL); |
112 |
// enable_interrupts(GLOBAL); |
111 |
|
113 |
|
112 |
toggle_dome(); |
114 |
toggle_dome(); |
113 |
return Ack_bit; |
115 |
return Ack_bit; |
114 |
} |
116 |
} |
115 |
|
117 |
|
116 |
|
118 |
|
117 |
//********************************************************************************************* |
119 |
//********************************************************************************************* |
Line 210... |
Line 212... |
210 |
else |
212 |
else |
211 |
{ |
213 |
{ |
212 |
j=0x00; |
214 |
j=0x00; |
213 |
i--; |
215 |
i--; |
214 |
} |
216 |
} |
- |
|
217 |
toggle_dome(); |
215 |
} |
218 |
} |
216 |
|
219 |
|
217 |
shift=BitPosition-8; /*Get shift value for crc value*/ |
220 |
shift=BitPosition-8; /*Get shift value for crc value*/ |
218 |
|
221 |
|
219 |
|
222 |
|
Line 232... |
Line 235... |
232 |
} |
235 |
} |
233 |
crc[i]<<=1; |
236 |
crc[i]<<=1; |
234 |
crc[i]+=temp; |
237 |
crc[i]+=temp; |
235 |
} |
238 |
} |
236 |
shift--; |
239 |
shift--; |
- |
|
240 |
toggle_dome(); |
237 |
} |
241 |
} |
238 |
|
242 |
|
239 |
//Exclusive OR between pec and crc |
243 |
//Exclusive OR between pec and crc |
240 |
for(i=0; i<=5; i++) |
244 |
for(i=0; i<=5; i++) |
241 |
{ |
245 |
{ |
242 |
pec[i] ^=crc[i]; |
246 |
pec[i] ^=crc[i]; |
243 |
} |
247 |
} |
244 |
} while(BitPosition>8);/*End of do-while*/ |
248 |
} while(BitPosition>8); |
245 |
|
249 |
|
246 |
return pec[0]; |
250 |
return pec[0]; |
247 |
} |
251 |
} |