| Line 1... |
Line 1... |
| 1 |
|
1 |
|
| 2 |
|
2 |
|
| 3 |
#define TDC_CLKHS 5000000 // frequency of highspeed oscillator |
3 |
#define TDC_CLKHS 6000000 // frequency of highspeed oscillator |
| 4 |
|
4 |
|
| 5 |
//register 0 |
5 |
//register 0 |
| 6 |
#define TDC_NEG_START_INV 1 |
6 |
#define TDC_NEG_START_INV 1 |
| 7 |
#define TDC_NEG_START 0 |
7 |
#define TDC_NEG_START 0 |
| 8 |
#define TDC_NEG_STOP1_INV 1 |
8 |
#define TDC_NEG_STOP1_INV 1 |
| Line 120... |
Line 120... |
| 120 |
//register 2 |
120 |
//register 2 |
| 121 |
#define TDC_INT_TIMEOUT 4 |
121 |
#define TDC_INT_TIMEOUT 4 |
| 122 |
#define TDC_INT_ENDHIT 2 |
122 |
#define TDC_INT_ENDHIT 2 |
| 123 |
#define TDC_INT_ALU 1 |
123 |
#define TDC_INT_ALU 1 |
| 124 |
#define TDC_CH1EDGE_RIS 0 |
124 |
#define TDC_CH1EDGE_RIS 0 |
| 125 |
#define TDC_CH1EDGE_FAL 1 |
125 |
#define TDC_CH1EDGE_FAL_RIS 1 |
| 126 |
#define TDC_CH2EDGE_RIS 0 |
126 |
#define TDC_CH2EDGE_RIS 0 |
| 127 |
#define TDC_CH2EDGE_FAL 1 |
127 |
#define TDC_CH2EDGE_FAL_RIS 1 |
| 128 |
|
128 |
|
| 129 |
//register 3 |
129 |
//register 3 |
| 130 |
#define TDC_TIM0MR2_256CLKHS 0 |
130 |
#define TDC_TIM0MR2_256CLKHS 0 |
| 131 |
#define TDC_TIM0MR2_1024CLKHS 1 |
131 |
#define TDC_TIM0MR2_1024CLKHS 1 |
| 132 |
#define TDC_TIM0MR2_4096CLKHS 2 |
132 |
#define TDC_TIM0MR2_4096CLKHS 2 |