Line 46... |
Line 46... |
46 |
|
46 |
|
47 |
int32 ble,ret32; |
47 |
int32 ble,ret32; |
48 |
int16 ret16; |
48 |
int16 ret16; |
49 |
int8 ret8; |
49 |
int8 ret8; |
50 |
|
50 |
|
- |
|
51 |
|
51 |
while(TRUE) |
52 |
while(TRUE) |
52 |
{ |
53 |
{ |
- |
|
54 |
delay_ms(100); |
- |
|
55 |
|
- |
|
56 |
|
53 |
TDC_reset(); |
57 |
TDC_reset(); |
54 |
delay_ms(100); |
58 |
delay_ms(100); |
55 |
|
59 |
|
56 |
//----------------------------------------------- Nastaveni registru |
60 |
//----------------------------------------------- Nastaveni registru |
57 |
output_low(TDC_ENABLE); |
61 |
output_low(TDC_ENABLE); |
Line 93... |
Line 97... |
93 |
ble=0; |
97 |
ble=0; |
94 |
ble=(8<<28)|(5<<24); |
98 |
ble=(8<<28)|(5<<24); |
95 |
ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0; |
99 |
ble|=(0<<21)|(0<<20)|(0<<19)|(0<<16)|0; |
96 |
spi_xfer(TDC_stream,ble,32); |
100 |
spi_xfer(TDC_stream,ble,32); |
97 |
output_high(TDC_ENABLE); |
101 |
output_high(TDC_ENABLE); |
98 |
|
- |
|
99 |
|
102 |
|
100 |
|
103 |
|
101 |
//----------------------------------------------- Vypis registru |
104 |
//----------------------------------------------- Vypis registru |
102 |
output_low(TDC_ENABLE); |
105 |
output_low(TDC_ENABLE); |
103 |
ret8=0; |
106 |
ret8=0; |
104 |
ret8=(0b1011<<4)|0; |
107 |
ret8=(0b1011<<4)|0; |
105 |
spi_xfer(TDC_stream,ret8,8); |
108 |
spi_xfer(TDC_stream,ret8,8); |