Rev 1435 Rev 1447
Line 30... Line 30...
30 #FUSES USBDIV //USB clock source comes from PLL divide by 2 30 #FUSES USBDIV //USB clock source comes from PLL divide by 2
31 #FUSES VREGEN //USB voltage regulator enabled 31 #FUSES VREGEN //USB voltage regulator enabled
32 #FUSES ICPRT //ICPRT enabled 32 #FUSES ICPRT //ICPRT enabled
33   33  
34 #use delay(clock=48000000) 34 #use delay(clock=48000000)
35 #use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8) 35 //#use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8)
36   36