Rev 2341 Rev 2342
Line 5... Line 5...
5 (Folder "Library") 5 (Folder "Library")
6 (File ".\nfet4x01b.dsn" 6 (File ".\nfet4x01b.dsn"
7 (Type "Schematic Design")) 7 (Type "Schematic Design"))
8 (BuildFileAddedOrDeleted "x") 8 (BuildFileAddedOrDeleted "x")
9 (CompileFileAddedOrDeleted "x") 9 (CompileFileAddedOrDeleted "x")
10 (NoModify)) 10 (NoModify)
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-   21 (DRC_Report_Ports_and_Off-page_Connectors "FALSE")
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-   23 (DRC_Report_Off-grid_Objects "FALSE")
-   24 (DRC_Check_Unconnected_Nets "TRUE")
-   25 (DRC_Check_for_Misleading_TAP "FALSE")
-   26 (DRC_Report_Netnames "FALSE")
-   27 (DRC_Check_Single_Node_Nets "TRUE")
-   28 (DRC_Check_No_Driving_Source "TRUE")
-   29 (DRC_Check_Duplicate_NetNames "TRUE")
-   30 (DRC_Check_Floating_Pins "TRUE")
-   31 (DRC_Check_Physical_Power_Pins_Visibility "TRUE")
-   32 (DRC_Check_PCB_Footprint_Property "TRUE")
-   33 (DRC_Check_Normal_Convert_View_Sync "TRUE")
-   34 (DRC_Check_Incorrect_PinGroup_Assignment "TRUE")
-   35 (DRC_Check_High_Speed_Props_Syntax "TRUE")
-   36 (DRC_Check_Missing_Pin_Numbers "TRUE")
-   37 (DRC_Check_Device_With_No_Pins "TRUE")
-   38 (DRC_Check_Power_Ground_Short "TRUE")
-   39 (DRC_Identical_References "TRUE")
-   40 (DRC_Type_Mismatch "TRUE")
-   41 (DRC_Visible_Power_pins "FALSE")
-   42 (DRC_Report_Unused_Part_Packages "TRUE")
-   43 (DRC_Check_Name_Prop_For_HierBlocks "TRUE")
-   44 (Netlist_TAB "8")
-   45 (OTHER_Part_Value "{Value}")
-   46 (OTHER_Netlist_File "NFET4X01B.asc")
-   47 (OTHER_Netlist_File2 "NFET4X01B.CMP")
-   48 (OTHER_View_Output "FALSE")
-   49 (OTHER_View_Output2 "FALSE")
-   50 (OTHER_Formatter "oraccel.dll")
-   51 (OTHER_PCB_Footprint "{Device},{Value}@{PCB Footprint}")
-   52 (OTHER_Switch0 "FALSE")
-   53 (OTHER_Switch1 "FALSE")
-   54 (OTHER_Switch2 "FALSE")
-   55 (OTHER_Switch3 "FALSE")
-   56 (OTHER_Switch4 "FALSE")
-   57 (OTHER_Switch5 "FALSE")
-   58 (OTHER_Switch6 "FALSE"))
11 (Folder "Outputs") 59 (Folder "Outputs"
-   60 (File ".\nfet4x01b.drc"
-   61 (Type "Report"))
-   62 (File ".\nfet4x01b.asc"
-   63 (Type "Report")))
12 (Folder "Referenced Projects") 64 (Folder "Referenced Projects")
13 (PartMRUSelector) 65 (PartMRUSelector)
14 (GlobalState 66 (GlobalState
15 (FileView 67 (FileView
16 (Path "Design Resources") 68 (Path "Design Resources")
17 (Path "Design Resources" ".\nfet4x01b.dsn") 69 (Path "Design Resources"
-   70 "c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn")
18 (Path "Design Resources" ".\nfet4x01b.dsn" "SCHEMATIC1") 71 (Path "Design Resources"
-   72 "c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn"
-   73 "SCHEMATIC1")
-   74 (Path "Outputs")
19 (Select "Design Resources")) 75 (Select "Design Resources"
-   76 "c:\users\kaklik\documents\svnmlab\modules\powersw\nfet4x01b\sch\nfet4x01b.dsn"
-   77 "SCHEMATIC1" "PAGE"))
20 (HierarchyView) 78 (HierarchyView)
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31 (Zoom "100") 89 (Zoom "100")
32 (Occurrence "/")) 90 (Occurrence "/"))
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33 (Path "D:\MLAB\MODULES\POWERSW\NFET4X01B\SCH\NFET4X01B.DSN") 92 "C:\USERS\KAKLIK\DOCUMENTS\SVNMLAB\MODULES\POWERSW\NFET4X01B\SCH\NFET4X01B.DSN")
34 (Schematic "SCHEMATIC1") 93 (Schematic "SCHEMATIC1")
35 (Page "PAGE2"))) 94 (Page "PAGE")))
36 (MPSSessionName "Jakub Kákona")) 95 (MPSSessionName "kaklik")
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