Rev 1745 Rev 1753
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1 #include <18F4550.h> 1 #include <18F8310.h>
2 #device adc=8 2 #device adc=8
3   3  
4 #FUSES NOWDT //No Watch Dog Timer 4 #FUSES NOWDT //No Watch Dog Timer
5 #FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale 5 #FUSES WDT128 //Watch Dog Timer uses 1:128 Postscale
6 #FUSES HS //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD) -  
7 #FUSES NOPROTECT //Code not protected from reading 6 #FUSES INTRC_IO //Internal RC Osc, no CLKOUT
8 #FUSES NOBROWNOUT //No brownout reset 7 #FUSES NOBROWNOUT //No brownout reset
9 #FUSES BORV20 //Brownout reset at 2.0V 8 #FUSES BORV46 //Brownout reset at 4.6V
10 #FUSES NOPUT //No Power Up Timer 9 #FUSES PUT //Power Up Timer
11 #FUSES NOCPD //No EE protection 10 #FUSES BW16 //16-bit external bus mode
12 #FUSES STVREN //Stack full/underflow will cause reset 11 #FUSES STVREN //Stack full/underflow will cause reset
13 #FUSES NODEBUG //No Debug mode for ICD 12 #FUSES NODEBUG //No Debug mode for ICD
14 #FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O -  
15 #FUSES NOWRT //Program memory not write protected -  
16 #FUSES NOWRTD //Data EEPROM not write protected -  
17 #FUSES IESO //Internal External Switch Over mode enabled 13 #FUSES NOIESO //Internal External Switch Over mode disabled
18 #FUSES FCMEN //Fail-safe clock monitor enabled 14 #FUSES NOFCMEN //Fail-safe clock monitor disabled
19 #FUSES PBADEN //PORTB pins are configured as analog input channels on RESET 15 #FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
20 #FUSES NOWRTC //configuration not registers write protected 16 #FUSES NOWAIT //Wait selections unavailable for Table Reads or Table Writes
21 #FUSES NOWRTB //Boot block not write protected 17 #FUSES NOPROTECT //Code not protected from reading
22 #FUSES NOEBTR //Memory not protected from table reads 18 #FUSES NOEBTR //Memory not protected from table reads
23 #FUSES NOEBTRB //Boot block not protected from table reads -  
24 #FUSES NOCPB //No Boot Block code protection 19 #FUSES NOLPT1OSC //Timer1 configured for higher power operation
25 #FUSES MCLR //Master Clear pin enabled 20 #FUSES MCLR //Master Clear pin enabled
26 #FUSES LPT1OSC //Timer1 configured for low-power operation -  
27 #FUSES NOXINST //Extended set extension and Indexed Addressing mode disabled (Legacy mode) -  
28 #FUSES PLL12 //Divide By 12(48MHz oscillator input) -  
29 #FUSES CPUDIV1 //System Clock by 1 -  
30 #FUSES USBDIV //USB clock source comes from PLL divide by 2 -  
31 #FUSES VREGEN //USB voltage regulator enabled -  
32 #FUSES ICPRT //ICPRT enabled 21 #FUSES MCU //Microcontroller Mode
33   -  
34 #use delay(clock=20000000) -  
35 #use rs232(baud=9600,parity=N,xmit=PIN_B7,rcv=PIN_B6,bits=8) -  
36   -  
37 #define TDC_ENABLE PIN_B3 //enable pin for SPI communication -  
38 #use spi(DI=PIN_B1, DO=PIN_B0, CLK=PIN_B2, stream=TDC_stream, bits=32) // uses software SPI -  
39   -  
40   22  
-   23 #use delay(clock=1000000)
-   24 #use rs232(baud=9600,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8)
41   25