CONFIG PART = xc6vlx240t-ff1156-1;
# The location constraints for REFCLK are implicitly given by the choice
# of the input buffer.
#NET "PCIE_REFCLK_P" LOC = V6;
#NET "PCIE_REFCLK_N" LOC = V5;
INST "*/pcieclk_ibuf" LOC = IBUFDS_GTXE1_X0Y4;
INST "*/pcie/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[0].GTX" LOC = GTXE1_X0Y15;
INST "*/pcie/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[1].GTX" LOC = GTXE1_X0Y14;
INST "*/pcie/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[2].GTX" LOC = GTXE1_X0Y13;
INST "*/pcie/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[3].GTX" LOC = GTXE1_X0Y12;
INST "*/pcie/pcie_2_0_i/pcie_block_i" LOC = PCIE_X0Y1;
INST "*/pcie/pcie_clocking_i/mmcm_adv_i" LOC = MMCM_ADV_X0Y7;
NET "PCIE_REFCLK_P" TNM_NET = "SYSCLK" ;
NET "*/pcie/pcie_clocking_i/clk_125" TNM_NET = "CLK_125" ;
NET "*/pcie/TxOutClk_bufg" TNM_NET = "TXOUTCLKBUFG";
TIMESPEC "TS_SYSCLK" = PERIOD "SYSCLK" 250 MHz HIGH 50 % PRIORITY 100 ;
TIMESPEC "TS_CLK_125" = PERIOD "CLK_125" TS_SYSCLK/2 HIGH 50 % PRIORITY 1 ;
TIMESPEC "TS_TXOUTCLKBUFG" = PERIOD "TXOUTCLKBUFG" 250 MHz HIGH 50 % PRIORITY 100 ;
PIN "*/pcie/trn_reset_n_int_i.CLR" TIG ;
PIN "*/pcie/trn_reset_n_i.CLR" TIG ;
PIN "*/pcie/pcie_clocking_i/mmcm_adv_i.RST" TIG ;
NET "PCIE_PERST_B_LS" TIG;
NET "PCIE_PERST_B_LS" LOC = AE13 | IOSTANDARD = LVCMOS25 | PULLUP | NODELAY ;
NET "GPIO_LED[0]" LOC = "AC22"; # DS12
NET "GPIO_LED[1]" LOC = "AC24"; # DS11
NET "GPIO_LED[2]" LOC = "AE22"; # DS9
NET "GPIO_LED[3]" LOC = "AE23"; # DS10
#################################################################
############## SYCHRO1
# Incoming clock to be divided:
NET "IN_CLK_LO_N" LOC = "B10"; ## H5 on J63 FMC_LPC_CLK0_M2C_N
NET "IN_CLK_LO_P" LOC = "A10"; ## H4 on J63 FMC_LPC_CLK0_M2C_P
# Timing for that:
NET "IN_CLK_LO_P" TNM_NET = "LOCLK";
TIMESPEC "TS_LOCLK" = PERIOD "LOCLK" 300 MHz HIGH 50% PRIORITY 50;
# Divided clock:
NET "OUT_CLK_LO_DIVIDED_N" LOC = "E31"; ## D9 on J63 FMC_LPC_LA01_CC_N
NET "OUT_CLK_LO_DIVIDED_P" LOC = "F31"; ## D8 on J63 FMC_LPC_LA01_CC_P
#nejde NET "OUT_CLK_LO_DIVIDED_N" LOC = "M5"; ## D5 on J63 "FMC_LPC_GBTCLK0_M2C_N"
#nejde NET "OUT_CLK_LO_DIVIDED_P" LOC = "M6"; ## D4 on J63 "FMC_LPC_GBTCLK0_M2C_P"
##################################
# INCOMING DATA FROM ADCs
# Incoming clock synchronous to incoming data:
NET "IN_CLK_FOR_DATA_N" LOC = "G33"; ## G3 on J63 FMC_LPC_CLK1_M2C_N
NET "IN_CLK_FOR_DATA_P" LOC = "F33"; ## G2 on J63 FMC_LPC_CLK1_M2C_P
# Timing for that:
NET "IN_CLK_FOR_DATA_P" TNM_NET = "ADCDATACLK";
#TIMESPEC "TS_ADCDATACLK" = PERIOD "ADCDATACLK" 40 MHz HIGH 50% PRIORITY 50;
TIMESPEC "TS_ADCDATACLK" = PERIOD "ADCDATACLK" 80 MHz HIGH 50% PRIORITY 50; # freq to ADC is 10MHz
# Incoming frame signal:
NET "IN_FRAME_FOR_DATA_N" LOC = "L30"; ## C23 on J63 FMC_LPC_LA18_CC_N
NET "IN_FRAME_FOR_DATA_P" LOC = "L29"; ## C22 on J63 FMC_LPC_LA18_CC_P
# Incoming data signal:
NET "IN_DATA_ADC_N[0]" LOC = "B33"; ## G19 on J63 FMC_LPC_LA16_N SAS-P2_0_N
NET "IN_DATA_ADC_P[0]" LOC = "A33"; ## G18 on J63 FMC_LPC_LA16_P SAS-P2_0_P
NET "IN_DATA_ADC_N[1]" LOC = "D32"; ## H17 on J63 FMC_LPC_LA11_N SAS-P2_1_N
NET "IN_DATA_ADC_P[1]" LOC = "D31"; ## H16 on J63 FMC_LPC_LA11_P SAS-P2_1_P
NET "IN_DATA_ADC_N[2]" LOC = "N29"; ## D21 on J63 FMC_LPC_LA17_CC_N SAS-P3_0_N
NET "IN_DATA_ADC_P[2]" LOC = "N28"; ## D20 on J63 FMC_LPC_LA17_CC_P SAS-P3_0_P
NET "IN_DATA_ADC_N[3]" LOC = "B32"; ## H20 on J63 FMC_LPC_LA15_N SAS-P3_1_N
NET "IN_DATA_ADC_P[3]" LOC = "C32"; ## H19 on J63 FMC_LPC_LA15_P SAS-P3_1_P
# MiniSAS channels P0 and P1
#NET "IN_DATA_ADC_N[0]" LOC = "J32"; ## G10 on J63 FMC_LPC_LA03_N SAS-P0_0_N
#NET "IN_DATA_ADC_P[0]" LOC = "J31"; ## G9 on J63 FMC_LPC_LA03_P SAS-P0_0_P
#NET "IN_DATA_ADC_N[1]" LOC = "J29"; ## H11 on J63 FMC_LPC_LA04_N SAS-P0_1_N
#NET "IN_DATA_ADC_P[1]" LOC = "K28"; ## H10 on J63 FMC_LPC_LA04_P SAS-P0_1_P
#NET "IN_DATA_ADC_N[2]" LOC = "K29"; ## G13 on J63 FMC_LPC_LA08_N SAS-P1_0_N
#NET "IN_DATA_ADC_P[2]" LOC = "J30"; ## G12 on J63 FMC_LPC_LA08_P SAS-P1_0_P
#NET "IN_DATA_ADC_N[3]" LOC = "H32"; ## H14 on J63 FMC_LPC_LA07_N SAS-P1_1_N
#NET "IN_DATA_ADC_P[3]" LOC = "G32"; ## H13 on J63 FMC_LPC_LA07_P SAS-P1_1_P
#NET "IN_DATA_ADC_N[0]" LOC = "R27"; ## D24 on J63 FMC_LPC_LA23_N
#NET "IN_DATA_ADC_P[0]" LOC = "R28"; ## D23 on J63 FMC_LPC_LA23_P
#NET "IN_DATA_ADC_N[1]" LOC = "M32"; ## D27 on J63 FMC_LPC_LA26_N
#NET "IN_DATA_ADC_P[1]" LOC = "L33"; ## D26 on J63 FMC_LPC_LA26_P
#NET "IN_DATA_ADC_N[2]" LOC = "J29"; ## H11 on J63 "FMC_LPC_LA04_N"
#NET "IN_DATA_ADC_P[2]" LOC = "K28"; ## H10 on J63 "FMC_LPC_LA04_P"
#NET "IN_DATA_ADC_N[3]" LOC = "H33"; ## D12 on J63 "FMC_LPC_LA05_N"
#NET "IN_DATA_ADC_P[3]" LOC = "H34"; ## D11 on J63 "FMC_LPC_LA05_P"
#NET "IN_DATA_ADC_N[4]" LOC = "J34"; ## C11 on J63 "FMC_LPC_LA06_N"
#NET "IN_DATA_ADC_P[4]" LOC = "K33"; ## C10 on J63 "FMC_LPC_LA06_P"
#NET "IN_DATA_ADC_N[5]" LOC = "H32"; ## H14 on J63 "FMC_LPC_LA07_N"
#NET "IN_DATA_ADC_P[5]" LOC = "G32"; ## H13 on J63 "FMC_LPC_LA07_P"
#NET "IN_DATA_ADC_N[6]" LOC = "K29"; ## G13 on J63 "FMC_LPC_LA08_N"
#NET "IN_DATA_ADC_P[6]" LOC = "J30"; ## G12 on J63 "FMC_LPC_LA08_P"
#NET "IN_DATA_ADC_N[7]" LOC = "L26"; ## D15 on J63 "FMC_LPC_LA09_N"
#NET "IN_DATA_ADC_P[7]" LOC = "L25"; ## D14 on J63 "FMC_LPC_LA09_P"
#NET "IN_DATA_ADC_N[8]" LOC = "G30"; ## C15 on J63 "FMC_LPC_LA10_N"
#NET "IN_DATA_ADC_P[8]" LOC = "F30"; ## C14 on J63 "FMC_LPC_LA10_P"
#NET "IN_DATA_ADC_N[9]" LOC = "D32"; ## H17 on J63 "FMC_LPC_LA11_N"
#NET "IN_DATA_ADC_P[9]" LOC = "D31"; ## H16 on J63 "FMC_LPC_LA11_P"
#NET "IN_DATA_ADC_N[10]" LOC = "E33"; ## G16 on J63 "FMC_LPC_LA12_N"
#NET "IN_DATA_ADC_P[10]" LOC = "E32"; ## G15 on J63 "FMC_LPC_LA12_P"
#NET "IN_DATA_ADC_N[11]" LOC = "C34"; ## D18 on J63 "FMC_LPC_LA13_N"
#NET "IN_DATA_ADC_P[11]" LOC = "D34"; ## D17 on J63 "FMC_LPC_LA13_P"
#NET "IN_DATA_ADC_N[12]" LOC = "B34"; ## C19 on J63 "FMC_LPC_LA14_N"
#NET "IN_DATA_ADC_P[12]" LOC = "C33"; ## C18 on J63 "FMC_LPC_LA14_P"
#NET "IN_DATA_ADC_N[13]" LOC = "B32"; ## H20 on J63 "FMC_LPC_LA15_N"
#NET "IN_DATA_ADC_P[13]" LOC = "C32"; ## H19 on J63 "FMC_LPC_LA15_P"
#NET "IN_DATA_ADC_N[14]" LOC = "B33"; ## G19 on J63 "FMC_LPC_LA16_N"
#NET "IN_DATA_ADC_P[14]" LOC = "A33"; ## G18 on J63 "FMC_LPC_LA16_P"
#NET "IN_DATA_ADC_N[15]" LOC = "N29"; ## D21 on J63 "FMC_LPC_LA17_CC_N"
#NET "IN_DATA_ADC_P[15]" LOC = "N28"; ## D20 on J63 "FMC_LPC_LA17_CC_P"
##########################################################
# four other LEDs:
NET "GPIO_LED2[0]" LOC = "AB23"; ## 2 on LED DS15, 5 on J62
NET "GPIO_LED2[1]" LOC = "AG23"; ## 2 on LED DS14, 6 on J62
NET "GPIO_LED2[2]" LOC = "AE24"; ## 2 on LED DS22, 7 on J62
NET "GPIO_LED2[3]" LOC = "AD24"; ## 2 on LED DS21, 8 on J62
##########################################################
## SAS-interface AUX 1 ~ 8
#NET "SAS-AUX[1]" LOC = "B34"; ## C19 on J63 FMC_LPC_LA14_N
#NET "SAS-AUX[2]" LOC = "C33"; ## C18 on J63 FMC_LPC_LA14_P
#NET "SAS-AUX[3]" LOC = "E33"; ## G16 on J63 FMC_LPC_LA12_N
#NET "SAS-AUX[4]" LOC = "E32"; ## G15 on J63 FMC_LPC_LA12_P
#NET "SAS-AUX[5]" LOC = "C34"; ## D18 on J63 FMC_LPC_LA13_N ## SOLDERED TO GND
#NET "SAS-AUX[6]" LOC = "D34"; ## D17 on J63 FMC_LPC_LA13_P
#NET "SAS-AUX[7]" LOC = "L26"; ## D15 on J63 FMC_LPC_LA09_N
#NET "SAS-AUX[8]" LOC = "L25"; ## D14 on J63 FMC_LPC_LA09_P ## SOLDERED TO GND
## SAS-interface LVDS lines:
#NET "SAS-P0_0_N" LOC = "J32"; ## G10 on J63 FMC_LPC_LA03_N SAS-P0_0_N
#NET "SAS-P0_0_P" LOC = "J31"; ## G9 on J63 FMC_LPC_LA03_P SAS-P0_0_P
#NET "SAS-P0_1_N" LOC = "J29"; ## H11 on J63 FMC_LPC_LA04_N SAS-P0_1_N
#NET "SAS-P0_1_P" LOC = "K28"; ## H10 on J63 FMC_LPC_LA04_P SAS-P0_1_P
#NET "SAS-P1_0_N" LOC = "K29"; ## G13 on J63 FMC_LPC_LA08_N SAS-P1_0_N
#NET "SAS-P1_0_P" LOC = "J30"; ## G12 on J63 FMC_LPC_LA08_P SAS-P1_0_P
#NET "SAS-P1_1_N" LOC = "H32"; ## H14 on J63 FMC_LPC_LA07_N SAS-P1_1_N
#NET "SAS-P1_1_P" LOC = "G32"; ## H13 on J63 FMC_LPC_LA07_P SAS-P1_1_P
#NET "SAS-P2_0_N" LOC = "B33"; ## G19 on J63 FMC_LPC_LA16_N SAS-P2_0_N
#NET "SAS-P2_0_P" LOC = "A33"; ## G18 on J63 FMC_LPC_LA16_P SAS-P2_0_P
#NET "SAS-P2_1_N" LOC = "D32"; ## H17 on J63 FMC_LPC_LA11_N SAS-P2_1_N
#NET "SAS-P2_1_P" LOC = "D31"; ## H16 on J63 FMC_LPC_LA11_P SAS-P2_1_P
#NET "SAS-P3_0_N" LOC = "N29"; ## D21 on J63 FMC_LPC_LA17_CC_N SAS-P3_0_N
#NET "SAS-P3_0_P" LOC = "N28"; ## D20 on J63 FMC_LPC_LA17_CC_P SAS-P3_0_P
#NET "SAS-P3_1_N" LOC = "B32"; ## H20 on J63 FMC_LPC_LA15_N SAS-P3_1_N
#NET "SAS-P3_1_P" LOC = "C32"; ## H19 on J63 FMC_LPC_LA15_P SAS-P3_1_P
##########################################################
# SPI interface:
NET "OUT_SPI_DOUT" LOC = "B34" | SLEW = SLOW | DRIVE = 2; ## C19 on J63 FMC_LPC_LA14_N SAS-AUX[1]
NET "OUT_SPI_CLK" LOC = "C33" | SLEW = SLOW | DRIVE = 2; ## C18 on J63 FMC_LPC_LA14_P SAS-AUX[2]
NET "OUT_SPI_N_CE[0]" LOC = "E33" | SLEW = SLOW | DRIVE = 2; ## G16 on J63 FMC_LPC_LA12_N SAS-AUX[3]
NET "OUT_SPI_N_CE[1]" LOC = "E32" | SLEW = SLOW | DRIVE = 2; ## G15 on J63 FMC_LPC_LA12_P SAS-AUX[4]
# Locate the BUFR near the output pins so that the timing can be reached.
INST "spi_transmitter_wrapper_inst/BUFR_inst" LOC = BUFR_X0Y8;
# test:
#NET "OUT_TEST1" LOC = "E32" | SLEW = FAST; ## G15 on J63 FMC_LPC_LA12_P
# DUMMY hard-connected to ground.
NET "IN_DUMMY[0]" LOC = "C34"; ## D18 on J63 FMC_LPC_LA13_N ## SOLDERED TO GND
NET "IN_DUMMY[1]" LOC = "L25"; ## D14 on J63 FMC_LPC_LA09_P ## SOLDERED TO GND
###############################################
# DIP switch
NET "GPIO_DIP_SW<0>" LOC = "D22"; ## 1 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<1>" LOC = "C22"; ## 2 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<2>" LOC = "L21"; ## 3 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<3>" LOC = "L20"; ## 4 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<4>" LOC = "C18"; ## 5 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<5>" LOC = "B18"; ## 6 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<6>" LOC = "K22"; ## 7 on SW1 DIP switch (active-high)
NET "GPIO_DIP_SW<7>" LOC = "K21"; ## 8 on SW1 DIP switch (active-high)