EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 30 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
 C?
 C_????_*
 C_????
 SMD*_c
 Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 20  -80 -30  80 -30 N
P 2 0 1 20  -80 30  80 30 N
X ~ 1 0 150 110 D 40 40 1 1 P
X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# STA350BW
#
DEF STA350BW U 0 40 Y Y 1 F N
F0 "U" 850 1350 60 H V C CNN
F1 "STA350BW" 1000 -1350 60 H V C CNN
F2 "" -450 500 60 H V C CNN
F3 "" -450 500 60 H V C CNN
DRAW
S -1100 1300 1100 -1250 0 1 0 f
X GND_SUB 1 -200 -1450 200 U 50 50 1 1 W
X SA 2 1300 -1000 200 L 50 50 1 1 I
X TEST_MODE 3 200 -1450 200 U 50 50 1 1 I
X VSS 4 -1300 -150 200 R 50 50 1 1 B
X VCC_REG 5 -1300 150 200 R 50 50 1 1 B
X OUT2B 6 1300 700 200 L 50 50 1 1 O
X GND2 7 -100 -1450 200 U 50 50 1 1 W
X VCC2 8 -400 1500 200 D 50 50 1 1 W
X OUT2A 9 1300 800 200 L 50 50 1 1 O
X OUT1B 10 1300 1000 200 L 50 50 1 1 O
X TWARN/OUT4A 20 1300 200 200 L 50 50 1 1 B
X SDI 30 -1300 300 200 R 50 50 1 1 I
X VCC1 11 -300 1500 200 D 50 50 1 1 W
X VDD_DIG 21 -100 1500 200 D 50 50 1 1 W
X RESET 31 400 1500 200 D 50 50 1 1 I
X GND1 12 0 -1450 200 U 50 50 1 1 W
X GND_DIG 22 -300 -1450 200 U 50 50 1 1 W
X INT_LINE 32 -1300 750 200 R 50 50 1 1 O
X OUT1A 13 1300 1100 200 L 50 50 1 1 O
X PWRDN 23 -1300 950 200 R 50 50 1 1 I
X SDA 33 -1300 600 200 R 50 50 1 1 B
X GND_REG 14 1300 -650 200 L 50 50 1 1 O
X VDD_PLL 24 0 1500 200 D 50 50 1 1 W
X SCL 34 -1300 450 200 R 50 50 1 1 I
X VDD 15 1300 -300 200 L 50 50 1 1 W
X FILTER_PLL 25 -1350 -600 200 R 50 50 1 1 I
X GND_DIG 35 100 -1450 200 U 50 50 1 1 W
X CONFIG 16 -1300 -450 200 R 50 50 1 1 W
X GND_PLL 26 300 -1450 200 U 50 50 1 1 W
X VDD_DIG 36 550 1500 200 D 50 50 1 1 W
X OUT3B/FFX3B 17 1300 400 200 L 50 50 1 1 O
X XTI 27 -1300 -750 200 R 50 50 1 1 I C
X OUT3A/FFX3A 18 1300 500 200 L 50 50 1 1 O
X BICKI 28 -1300 -300 200 R 50 50 1 1 I C
X EAPD/OUT4B 19 1300 100 200 L 50 50 1 1 O
X LRCKI 29 -1300 0 200 R 50 50 1 1 I C
ENDDRAW
ENDDEF
#
#End Library