(ExpressProject "CLKDIV"
  (ProjectVersion "19981106")
  (ProjectType "PCB")
  (Folder "Design Resources"
    (Folder "Library")
    (NoModify)
    (File ".\clkdiv.dsn"
      (Type "Schematic Design"))
    (BuildFileAddedOrDeleted "x")
    (CompileFileAddedOrDeleted "x")
    (DRC_Scope "0")
    (DRC_Action "0")
    (DRC_Create_Warnings "FALSE")
    (DRC_View_Output "FALSE")
    (DRC_Run_Electrical_Rules "TRUE")
    (DRC_Run_Physical_Rules "FALSE")
    (DRC_Report_File
       "C:\USERS\KAKLIK\DOCUMENTS\MLAB\MODULES\CLOCK\CLKDIV01A\SCH\CLKDIV.DRC")
    (DRC_Check_Ports "FALSE")
    (DRC_Check_Off-Page_Connectors "FALSE")
    (DRC_Report_Ports_and_Off-page_Connectors "FALSE")
    (DRC_SDT_Compatibility "FALSE")
    (DRC_Report_Off-grid_Objects "FALSE")
    (DRC_Check_Unconnected_Nets "TRUE")
    (DRC_Check_for_Misleading_TAP "FALSE")
    (DRC_Report_Netnames "FALSE")
    (DRC_Check_Single_Node_Nets "TRUE")
    (DRC_Check_No_Driving_Source "TRUE")
    (DRC_Check_Duplicate_NetNames "TRUE")
    (DRC_Check_Floating_Pins "TRUE")
    (DRC_Check_Physical_Power_Pins_Visibility "TRUE")
    (DRC_Check_PCB_Footprint_Property "TRUE")
    (DRC_Check_Normal_Convert_View_Sync "TRUE")
    (DRC_Check_Incorrect_PinGroup_Assignment "TRUE")
    (DRC_Check_High_Speed_Props_Syntax "TRUE")
    (DRC_Check_Missing_Pin_Numbers "TRUE")
    (DRC_Check_Device_With_No_Pins "TRUE")
    (DRC_Check_Power_Ground_Short "TRUE")
    (DRC_Identical_References "TRUE")
    (DRC_Type_Mismatch "TRUE")
    (DRC_Visible_Power_pins "FALSE")
    (DRC_Report_Unused_Part_Packages "TRUE")
    (DRC_Check_Name_Prop_For_HierBlocks "TRUE")
    (Netlist_TAB "8")
    (OTHER_Part_Value "{Value}")
    (OTHER_Netlist_File "CLKDIV.asc")
    (OTHER_Netlist_File2 "CLKDIV.CMP")
    (OTHER_View_Output "FALSE")
    (OTHER_View_Output2 "FALSE")
    (OTHER_PCB_Footprint "{Device},{Value}@{PCB Footprint}")
    (OTHER_Switch0 "FALSE")
    (OTHER_Switch1 "FALSE")
    (OTHER_Switch2 "FALSE")
    (OTHER_Switch3 "FALSE")
    (OTHER_Switch4 "FALSE")
    (OTHER_Switch5 "FALSE")
    (OTHER_Switch6 "FALSE")
    (OTHER_Formatter "orPadspcb.dll"))
  (Folder "Outputs"
    (File ".\clkdiv.drc"
      (Type "Report"))
    (File ".\clkdiv.asc"
      (Type "Report")))
  (Folder "Referenced Projects")
  (PartMRUSelector
    (JUMP2X1_CON
      (FullPartName "JUMP2X1_CON.Normal")
      (LibraryName "C:\LIBRARY\ORCAD16X\JUMP.OLB")
      (DeviceIndex "0"))
    (TP
      (FullPartName "TP.Normal")
      (LibraryName "C:\LIBRARY\ORCAD16X\PAD.OLB")
      (DeviceIndex "0"))
    (JUMP2X2_CON
      (FullPartName "JUMP2X2_CON.Normal")
      (LibraryName "C:\LIBRARY\ORCAD16X\JUMP.OLB")
      (DeviceIndex "0"))
    (JUMP2X3
      (FullPartName "JUMP2X3.Normal")
      (LibraryName "C:\LIBRARY\ORCAD16X\JUMP.OLB")
      (DeviceIndex "0"))
    (SO16_150
      (FullPartName "SO16_150.Normal")
      (LibraryName "C:\LIBRARY\ORCAD16X\DECALES.OLB")
      (DeviceIndex "0")))
  (ISPCBBASICLICENSE "false")
  (GlobalState
    (FileView
      (Path "Design Resources")
      (Path "Design Resources" ".\clkdiv.dsn")
      (Path "Design Resources" ".\clkdiv.dsn" "SCHEMATIC1")
      (Path "Outputs")
      (Select "Design Resources" ".\clkdiv.dsn" "SCHEMATIC1" "PAGE1"))
    (HierarchyView)
    (Doc
      (Type "COrCapturePMDoc")
      (Frame
        (Placement "44 2 3 -1 -1 -8 -30 0 200 0 579"))
      (Tab 0))
    (Doc
      (Type "COrSchematicDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -8 -30 25 1582 25 642")
        (Scroll "-157 0")
        (Zoom "103")
        (Occurrence "/"))
      (Path
         "C:\USERS\KAKLIK\DOCUMENTS\MLAB\MODULES\CLOCK\CLKDIV01A\SCH\CLKDIV.DSN")
      (Schematic "SCHEMATIC1")
      (Page "PAGE1")))
  (MPSSessionName "kaklik")
  (LastUsedLibraryBrowseDirectory "C:\library\ORCAD16X\OnSemiconductor"))