Rev 3122 – miho – 4163 d 17 h (2013-06-25 15:54:15)
Demo aplikace Xilinx ChipScope pro S3AN01 s použitím Xilinx Virtual Cable technologie
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CPLD_FPGA
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XILINX_CHIPSCOPE
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ANALYSER/
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Analyser.ini
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Analyser_9_2048.cpj
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Analyser_18_1024.cpj
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4163 d 17 h
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