Rev Age Author Path Log message Diff Changes
1974 4778 d 23 h kakl /Designs/LABduino/DOC/ Pridana tabulka prirazeni vstupu. Diff
/Designs/LABduino/DOC/LABduino.cs.pdf
/Designs/LABduino/DOC/LABduino.doc
1973 4779 d 0 h kakl /Designs/LABduino/DOC/ Zmena formatovani, aby nebyla pretrzena tabulka. Diff
/Designs/LABduino/DOC/LABduino.cs.pdf
/Designs/LABduino/DOC/LABduino.doc
1972 4779 d 0 h kakl /Designs/LABduino/ Diff
/Designs/LABduino/DOC
/Designs/LABduino/doc
1971 4779 d 0 h kakl /Designs/LABduino/doc/ Prejmenovan navod. Diff
/Designs/LABduino/doc/LABduino.cs.pdf
/Designs/LABduino/doc/LABduino.doc
1970 4779 d 0 h kakl /Designs/LABduino/doc/ Prejmenovano. Diff
/Designs/LABduino/doc/LABduino_HowTo.doc
/Designs/LABduino/doc/LABduino_HowTo.pdf
1969 4779 d 0 h kakl /Designs/LABduino/ Jak postavir z MLABu Arduino. Diff
/Designs/LABduino
/Designs/LABduino/LABduino_Big.jpg
/Designs/LABduino/LABduino_Small.jpg
/Designs/LABduino/PrjInfo.txt
/Designs/LABduino/doc
/Designs/LABduino/doc/LABduino_HowTo.doc
/Designs/LABduino/doc/LABduino_HowTo.pdf
1968 4779 d 8 h miho /Modules/CPLD_FPGA/S3AN01A/DOC/ Doplněna PDF verze dokumentace S3AN01A Diff
/Modules/CPLD_FPGA/S3AN01A/DOC/S3AN01A.cs.pdf
1967 4779 d 16 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ oprava chyby ve vypoctu casu a implementace mereni teploty. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1966 4779 d 17 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ prvni implementace prepoctu na realne jednotky. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/GP2.h
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
1965 4779 d 20 h kaklik /Modules/TDC/GP201A/ implementace i posledni primitivy pro nastavovani registru Diff
/Modules/TDC/GP201A/DOC/datasheet.txt
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt
1964 4779 d 20 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ prepsani cteni dat do puvodnich primitiv. Diff
/Modules/TDC/GP201A/SW/PICinterface/GP2.c
/Modules/TDC/GP201A/SW/PICinterface/main.c
/Modules/TDC/GP201A/SW/PICinterface/main.hex
/Modules/TDC/GP201A/SW/PICinterface/main.pjt
1963 4780 d 2 h kaklik /Designs/Tools/reflow2/SW/ programovani reflow procesu. Diff
/Designs/Tools/reflow2/SW/reflow.PJT
/Designs/Tools/reflow2/SW/reflow.c
/Designs/Tools/reflow2/SW/reflow.hex
1962 4780 d 17 h kaklik /Modules/Sensors/IUC01A/ vytvoreni modulu pro proudove cidlo. Diff
/Modules/Sensors/IUC01A
/Modules/Sensors/IUC01A/CAM_DOC/IUC01.pdf
/Modules/Sensors/IUC01A/DOC/IUC01A.pdf
/Modules/Sensors/IUC01A/PCB/IUC01.pcb
/Modules/Sensors/IUC01A/SCH/IUC01.DSN
/Modules/Sensors/IUC01A/SCH/IUC01.pdf
/Modules/Sensors/IUC01A/PrjInfo.txt
1961 4780 d 19 h kaklik /Designs/Thermometer/ dokumentace Diff
/Designs/Thermometer/DOC
/Designs/Thermometer/DOC/SRC
/Designs/Thermometer/DOC/SRC/Thermometer_Big.JPG
/Designs/Thermometer/Thermometer_Small.JPG
1960 4780 d 20 h kaklik /Designs/Tools/reflow2/SW/ naprogramovani prvni casti reflow procesu Diff
/Designs/Tools/reflow2/SW/process.h
/Designs/Tools/reflow2/SW/reflow.PJT
/Designs/Tools/reflow2/SW/reflow.c
/Designs/Tools/reflow2/SW/reflow.hex
1959 4781 d 0 h kakl /Designs/MRAKOMER4/SW/HEX/ Pro Sibir. Diff
/Designs/MRAKOMER4/SW/HEX/irmrak4.hex
1958 4781 d 0 h kakl /Designs/MRAKOMER4/SW/ Pro Sibir. Diff
/Designs/MRAKOMER4/SW/HEX/irmrak4.hex
/Designs/MRAKOMER4/SW/irmrak4.c
1957 4781 d 0 h kaklik /Designs/Tools/reflow2/SW/ zkalibrovani teplomeru v troube Diff
/Designs/Tools/reflow2/SW/reflow.c
/Designs/Tools/reflow2/SW/reflow.hex
1956 4781 d 3 h kaklik /Modules/PIC/PICPROGUSB02A/ vylepseni fotografii Diff
/Modules/PIC/PICPROGUSB02A/DOC/SRC/PICPROGUSB02A_Top_Big.jpg
/Modules/PIC/PICPROGUSB02A/PICPROGUSB02A_Top_Small.jpg
/Modules/PIC/PICPROGUSB02A/DOC/SRC/PICPROGUSB02A_Top_.Small.jpg
/Modules/PIC/PICPROGUSB02A/PICPROGUSB02A_Top_.Small.jpg
/Modules/PIC/PICPROGUSB02A/PICPROGUSB02A_Top_Big.jpg
1955 4781 d 4 h miho /Modules/CPLD_FPGA/S3AN01A/DOC/SRC/ Diff
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát1.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát2a.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Drát2b.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Bot_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Top_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A_Top_Small.jpg
1954 4781 d 4 h miho /Modules/CPLD_FPGA/S3AN01A/ Dokumentace pro S3AN01A (podomácku vyrobená verze) Diff
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A.cs.html
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image001.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image002.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image003.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image004.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image005.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image006.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image007.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image008.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image009.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A_files/image010.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Drát1.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Drát2a.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Drát2b.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/NákresSpoje.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Potisk.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/S3AN01A_Bot_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/S3AN01A_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/S3AN01A_Top_Big.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/S3AN01A_Top_Small.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Spoje1.png
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Spoje2.png
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Vrtačka1.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/Picures/Vrtačka2.jpg
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/S3AN01A.cs.doc
/Modules/CPLD_FPGA/S3AN01A/PrjInfo.txt
1953 4781 d 19 h kaklik /Modules/Clock/CLKGEN01B/DOC/SRC/ prejmenovani podle konvence Diff
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.cs.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator.cs.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/CLKGEN.tex
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator.tex
1952 4781 d 19 h kaklik /Modules/Clock/CLKGEN01B/DOC/ oprava preklepu Diff
/Modules/Clock/CLKGEN01B/DOC/DG8SAQ_emulator.cs.pdf
/Modules/Clock/CLKGEN01B/DOC/SRC/DG8SAQ_emulator.tex
1951 4786 d 2 h kakl /Designs/dum/SW/2patra/ Pridan datasheet k PIC na hvezdarnu. Diff
/Designs/dum/SW/2patra/18f8310.pdf
1950 4786 d 8 h miho /Modules/CPLD_FPGA/S3AN01B/ S3AN01B doplněny obrázky (pro dokumentaci) Diff
/Modules/CPLD_FPGA/S3AN01B/DOC
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B_Bot_Big.jpg
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B_Top_Big.jpg
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B_Top_Small.jpg
/Modules/CPLD_FPGA/S3AN01B/S3AN01B_Bot_Small.jpg
/Modules/CPLD_FPGA/S3AN01B/S3AN01B_Top_Small.jpg
1949 4786 d 16 h kaklik /Designs/Thermometer/ prejmenovani souboru podle konvence Diff
/Designs/Thermometer/PrjInfo.txt
1948 4786 d 17 h kaklik /Designs/GPSnavigator/DOC/ prejmenovani souboru podle konvence Diff
/Designs/GPSnavigator/DOC/GPSnavigator.cs.pdf
/Designs/GPSnavigator/DOC/GPSnavigator.pdf
1947 4786 d 17 h kaklik / prejmenovani souboru podle konvence Diff
/Designs/STOPWATCH02A/DOC/STOPWATCH02A.cs.pdf
/Modules/PIC/PICPROGUSB02A/DOC/PICPROGUSB02A.cs.pdf
/Designs/STOPWATCH02A/DOC/STOPWATCH02A.pdf
/Modules/PIC/PICPROGUSB02A/DOC/PICPROGUSB02A.pdf
1946 4786 d 22 h kaklik /Modules/PIC/PIC18F8xTQ8001A/DOC/ aktualizace dokumentace Diff
/Modules/PIC/PIC18F8xTQ8001A/DOC/PIC18F8xTQ8001A.cs.pdf
/Modules/PIC/PIC18F8xTQ8001A/DOC/PIC18F8xTQ8001A.en.pdf
/Modules/PIC/PIC18F8xTQ8001A/DOC/PIC18F8x2001A.cs.pdf
1945 4787 d 0 h kaklik /Designs/Tools/reflow2/DOC/calibration/ kalibrace teplomeru v reflow Diff
/Designs/Tools/reflow2/DOC/calibration/fit.log
/Designs/Tools/reflow2/DOC/calibration/plot.gp
/Designs/Tools/reflow2/DOC/calibration/temperature.png
1944 4787 d 0 h kaklik /Designs/Thermometer/ Demo teploměru postaveného z MLABu. Diff
/Designs/Thermometer
/Designs/Thermometer/SW
/Designs/Thermometer/SW/1wire.c
/Designs/Thermometer/SW/ds1820.c
/Designs/Thermometer/SW/macro.ini
/Designs/Thermometer/SW/main.c
/Designs/Thermometer/SW/main.h
/Designs/Thermometer/SW/main.hex
/Designs/Thermometer/SW/main.pjt
1943 4787 d 23 h kaklik /Designs/Tools/reflow2/ kalibrace teplomeru v reflow. Diff
/Designs/Tools/reflow2/DOC
/Designs/Tools/reflow2/DOC/calibration
/Designs/Tools/reflow2/DOC/calibration/calibration_data.txt
/Designs/Tools/reflow2/SW/reflow.PJT
/Designs/Tools/reflow2/SW/reflow.c
/Designs/Tools/reflow2/SW/reflow.hex
1942 4788 d 4 h kaklik /Designs/Tools/reflow2/SW/ Diff
/Designs/Tools/reflow2/SW/reflow.PJT
/Designs/Tools/reflow2/SW/reflow.c
/Designs/Tools/reflow2/SW/reflow.h
/Designs/Tools/reflow2/SW/reflow.hex
1941 4789 d 6 h kaklik /Modules/H_Bridge/MPC17511HB01A/DOC/ oprava dokumentace Diff
/Modules/H_Bridge/MPC17511HB01A/DOC/MPC17511HB01A.cs.pdf
/Modules/H_Bridge/MPC17511HB01A/DOC/SRC/MPC17511HB01A.doc
1940 4791 d 1 h miho /Web/Maintenance/ Doplněno sudo do volání hddtemp na stránce údržby (řešení přístupvého práva k /dev/sd?) Diff
/Web/Maintenance/List.php
1939 4791 d 4 h kaklik /Modules/Clock/CLKGEN01B/ preklad Diff
/Modules/Clock/CLKGEN01B/DOC/CLKGEN01B.en.pdf
/Modules/Clock/CLKGEN01B/opravit.txt
1938 4791 d 6 h miho /WebSVN/ Uprava pro dokonceni skriptu pri stahovani ZIP z WebSCN (uklid v tmp adresari) Diff
/WebSVN/dl.php
1937 4793 d 1 h miho /Modules/CPLD_FPGA/S3AN01B/PCB/ Aktualizovány hodnoty součástek (synchronizace se schématem). Diff
/Modules/CPLD_FPGA/S3AN01B/PCB/S3AN01B.pcb
1936 4793 d 2 h miho /Modules/CPLD_FPGA/S3AN01B/SCH/ Aktualizovaný seznam součástek a cenový přehled (nutno doplnit reálnou cenu PCB z faktury). Diff
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_BOM.xls
1935 4793 d 7 h miho /Modules/CPLD_FPGA/S3AN01B/SCH/ Aktualizace schématu (formální změny). Pracovní verze seznamu součástek. Diff
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_BOM.xls
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_SCH.PDF
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.ASC
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.DSN