| 1980 |
4936 d 3 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
pokus o zprovozneni mericiho modu 1.
V tomto stavu ale asi nefunguje ani mereni teploty. |
Diff |
| 1978 |
4936 d 8 h |
kaklik |
/Modules/CommRF/ZIGBEE01A/ |
pridan popisek |
Diff |
| 1977 |
4936 d 9 h |
kaklik |
/Modules/ |
založen nový modul pro RF směšovač.. |
Diff |
| 1976 |
4937 d 4 h |
kaklik |
/Modules/CommSerial/USBIO01A/ |
doplneni anglickeho popisku. |
Diff |
| 1968 |
4941 d 11 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/DOC/ |
Doplněna PDF verze dokumentace S3AN01A |
Diff |
| 1967 |
4941 d 19 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
oprava chyby ve vypoctu casu a implementace mereni teploty. |
Diff |
| 1966 |
4941 d 20 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
prvni implementace prepoctu na realne jednotky. |
Diff |
| 1965 |
4941 d 23 h |
kaklik |
/Modules/TDC/GP201A/ |
implementace i posledni primitivy pro nastavovani registru |
Diff |
| 1964 |
4941 d 23 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
prepsani cteni dat do puvodnich primitiv. |
Diff |
| 1962 |
4942 d 20 h |
kaklik |
/Modules/Sensors/IUC01A/ |
vytvoreni modulu pro proudove cidlo. |
Diff |
| 1956 |
4943 d 6 h |
kaklik |
/Modules/PIC/PICPROGUSB02A/ |
vylepseni fotografii |
Diff |
| 1955 |
4943 d 7 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/ |
|
Diff |
| 1954 |
4943 d 7 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
Dokumentace pro S3AN01A (podomácku vyrobená verze) |
Diff |
| 1953 |
4943 d 22 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/SRC/ |
prejmenovani podle konvence |
Diff |
| 1952 |
4943 d 22 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
oprava preklepu |
Diff |
| 1950 |
4948 d 11 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/ |
S3AN01B doplněny obrázky (pro dokumentaci) |
Diff |
| 1947 |
4948 d 20 h |
kaklik |
/ |
prejmenovani souboru podle konvence |
Diff |
| 1946 |
4949 d 1 h |
kaklik |
/Modules/PIC/PIC18F8xTQ8001A/DOC/ |
aktualizace dokumentace |
Diff |
| 1941 |
4951 d 9 h |
kaklik |
/Modules/H_Bridge/MPC17511HB01A/DOC/ |
oprava dokumentace |
Diff |
| 1939 |
4953 d 7 h |
kaklik |
/Modules/Clock/CLKGEN01B/ |
preklad |
Diff |
| 1937 |
4955 d 4 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/PCB/ |
Aktualizovány hodnoty součástek (synchronizace se schématem). |
Diff |
| 1936 |
4955 d 5 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/SCH/ |
Aktualizovaný seznam součástek a cenový přehled (nutno doplnit reálnou cenu PCB z faktury). |
Diff |
| 1935 |
4955 d 10 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/SCH/ |
Aktualizace schématu (formální změny). Pracovní verze seznamu součástek. |
Diff |
| 1934 |
4956 d 0 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
kus anglickeho prekladu |
Diff |
| 1933 |
4956 d 1 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
kus anglickeho prekladu |
Diff |
| 1932 |
4958 d 4 h |
kaklik |
/Modules/Clock/CLKGEN01B/DOC/ |
prejmenovani podle konvence |
Diff |
| 1931 |
4960 d 19 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
testovani TDC |
Diff |
| 1930 |
4961 d 0 h |
kaklik |
/ |
preklad kodu |
Diff |
| 1914 |
4971 d 4 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
Vygenerovani potisku |
Diff |
| 1913 |
4971 d 4 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
prace na modulu pro ethernet |
Diff |
| 1912 |
4971 d 4 h |
kaklik |
/Modules/CommSerial/ETH02A/ |
prace na modulu pro ethernet |
Diff |
| 1911 |
4971 d 22 h |
kaklik |
/Modules/ |
Vyvoj tistaku pro ETHERNET. |
Diff |
| 1910 |
4972 d 23 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
nalezene chyby |
Diff |
| 1908 |
4974 d 18 h |
klimma |
/Modules/PowerSupply/klimma/ |
|
Diff |
| 1907 |
4974 d 22 h |
kaklik |
/Modules/PowerSupply/MC3406301A/pdf/ |
dokumentace |
Diff |
| 1906 |
4976 d 10 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A doplnění obrázků |
Diff |
| 1899 |
4977 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A je již zastaralá konstrukce |
Diff |
| 1898 |
4977 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01B/ |
S3AN01B revize desky S3AN01A (s opravami) |
Diff |
| 1897 |
4977 d 2 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/SCH/ |
S3AN01A doplněny texty |
Diff |
| 1896 |
4981 d 0 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. |
Diff |