Rev Age Author Path Log message Diff Changes
3475 3924 d 23 h kaklik / Pridani dalsi dokumentace. Diff
/Designs/Measuring_instruments/AWS01B/SW/PIC16F887/i2c_wind_sensor/main.hex
/Modules/Clock/CLKDIV01A/DOC/SRC/CLKDIV01A.cs.tex
3459 3933 d 3 h kaklik / pridani obrazku nove vyvijenych konstrukci. Diff
/Designs/Measuring_instruments/RMDS01C/DOC/SRC/img/Sync_prototype.JPG
/Modules/Clock/CLKGEN01B/DOC/SRC/img/CLKGEN01B_connection_Big.jpg
3447 3952 d 2 h kaklik /Modules/Clock/CLKDIV01A/ pradani maleho obrazku modulu. Diff
/Modules/Clock/CLKDIV01A/CLKDIV01A_Top_Small.jpg
3445 3952 d 2 h kaklik / zlepseni dokumentace modulu. Diff
/Modules/ADconverters/ACOMP01A/DOC/SRC/img
/Modules/ADconverters/ACOMP01A/DOC/SRC/img/ACOMP01A_QRcode.png
/Modules/ADconverters/ADCdual01A/DOC/SRC/img
/Modules/ADconverters/ADCdual01A/DOC/SRC/img/ADCdual01A_QRcode.png
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img/S6AN01A_QRcode.png
/Modules/Clock/CLK1PLL01A/DOC/SRC
/Modules/Clock/CLK1PLL01A/DOC/SRC/img
/Modules/Clock/CLK1PLL01A/DOC/SRC/img/CLK1PLL01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/CLKDIV01A.cs.pdf
/Modules/Clock/CLKDIV01A/DOC/SRC/img
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_Top_Big.jpg
/Modules/CommRF/FORX01A/DOC/SRC/img
/Modules/CommRF/FORX01A/DOC/SRC/img/FORX01A_QRcode.png
/Modules/CommRF/FOTX01A/DOC/SRC/img
/Modules/CommRF/FOTX01A/DOC/SRC/img/FOTX01A_QRcode.png
/Modules/CommSerial/USBI2C01A/DOC/SRC/img
/Modules/CommSerial/USBI2C01A/DOC/SRC/img/USBI2C01A_QRcode.png
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Top_Big.jpg
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img/BATPOWER04A_QRcode.png
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img/BATPOWER04B_QRcode.png
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img/CHPUMP01A_QRcode.png
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img/TPS63060V01A_QRcode.png
/Modules/Sensors/RPS01A/DOC/SRC/img
/Modules/Sensors/RPS01A/DOC/SRC/img/RPS01A_QRcode.png
/Modules/Universal/UNISERIAL01A/DOC/SRC/img
/Modules/Universal/UNISERIAL01A/DOC/SRC/img/UNISERIAL01A_QRcode.png
/Modules/Clock/CLKDIV01A/SW
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Top_Big.jpg
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.cs.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/Clock/CLKDIV01A/PrjInfo.txt
/Modules/Measuring/GPS01A/TODO.txt
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png
3444 3952 d 3 h kaklik /Modules/Clock/CLKDIV01A/ zaznam chyb na modulu. Diff
/Modules/Clock/CLKDIV01A/TODO.txt
3431 3957 d 0 h miho /Modules/Clock/CLK1PLL01A/SCH/ Diff
/Modules/Clock/CLK1PLL01A/SCH/!____!.txt
3430 3957 d 1 h miho /Modules/Clock/CLK1PLL01A/SCH/ Doplněn komentář. Diff
/Modules/Clock/CLK1PLL01A/SCH/!____!.txt
3429 3957 d 3 h miho /Modules/Clock/CLK1PLL01A/ Dogenerované PDF soubory Diff
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf
3428 3957 d 8 h miho /Modules/Clock/CLK1PLL01A/ Opraven SCH a PCB CLK1PLL01A (oprava EN vývodů u stabilizátorů), nutno ještě přegenerovat PDF výstupy od plošného spoje (zde PDF995 generuje velmi nekvalitní výstupy, nutno použít něco funkčnějšího). Diff
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf
3427 3959 d 4 h kaklik / vylepseni dokumentace studie prijimace Diff
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.png
/Modules/Clock/CLK1PLL01A/pdf
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
3425 3960 d 19 h kaklik / pridani dalsi dokumentace. Diff
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf
/Designs/Laboratory_instruments/High_voltage_power_supply/pdf/ADuM3190.pdf
/Modules/CPLD_FPGA/S6AN01A/pdf/HDMI_connector.pdf
/Modules/Sensors/ALTIMET01A/SW/Python/dpi145_test.py
/Modules/Clock/CLKDIV01A/TODO.txt
/Modules/Clock/CLKGEN01B/pdf/Si570.pdf
/Modules/CommSerial/I2CHUB02A/TODO.txt
/Modules/H_Bridge/DRV8835HB01A/TODO.txt
/Modules/Measuring/GPS01A/TODO.txt
3424 3960 d 22 h miho /Modules/Clock/CLK1PLL01A/ Hodinový PLL generátor s obvodem TI CDCE913 (schema, PCB a technologické výstupy). Diff
/Modules/Clock/CLK1PLL01A
/Modules/Clock/CLK1PLL01A/CAM_AMA
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI
/Modules/Clock/CLK1PLL01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/DOC
/Modules/Clock/CLK1PLL01A/PCB
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/PrjInfo.txt
/Modules/Clock/CLK1PLL01A/SCH
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf
3421 3963 d 0 h kaklik / vylepseni dokumentace. Diff
/Modules/CommSerial/TBPCIE01A/pdf/konektory/MB-0248-1E_DP3.pdf
/Modules/CommSerial/TBPCIE01A/pdf/thunderbolt-technology-brief.pdf
/Modules/PowerSupply/BATPOWER04B/pdf/15mq040n.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC
/Modules/Universal/UNISERIAL01A/CAM_DOC/O1.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/O2.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/SCH.pdf
/Modules/Universal/UNISERIAL01A/CAM_DOC/V2.pdf
/Modules/Universal/UNISERIAL01A/DOC
/Modules/Universal/UNISERIAL01A/DOC/SRC
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.aux
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.log
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.out
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.pdf
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.synctex.gz
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.tex
/Modules/Universal/UNISERIAL01A/DOC/SRC/UNISERIAL01A.cs.toc
/Modules/Universal/UNISERIAL01A/PrjInfo.txt
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB1.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB2.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_PCB4.pdf
/Modules/Universal/UNISERIAL01A/sch&pcb/UNISERIAL01A_SCH.pdf
/Designs/HAM Constructions/SDRX01B/DOC/SRC/SDRX01B.cs.tex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.c
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.hex
/Designs/Measuring_instruments/RMDS01B/SW/timemark/main.pjt
/Modules/ARM/STM32F10xRxT01A/DOC/SRC/STM32F10xRxT.cs.tex
/Modules/Clock/CLKHUB02A/DOC/SRC/CLKHUB02A.cs.tex
3404 3982 d 16 h kaklik /Modules/Clock/CLKDIV01A/ vygenerovani nahledu. Diff
/Modules/Clock/CLKDIV01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V1.pdf
/Modules/Clock/CLKDIV01A/CAM_DOC/V2.pdf
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3403 3982 d 16 h kaklik /Modules/Clock/CLKDIV01A/ oprava chyb z TODO. Diff
/Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3402 3982 d 17 h kaklik /Modules/Clock/CLKDIV01A/ zaznam nalezenych chyb.. Diff
/Modules/Clock/CLKDIV01A/TODO.txt
3401 3982 d 17 h kaklik /Modules/Clock/CLKDIV01A/ pridani popisu nalezenych chyb. Diff
/Modules/Clock/CLKDIV01A/TODO.txt
3398 3982 d 21 h kaklik /Modules/Clock/CLKDIV01A/SCH/ Diff
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
/Modules/Clock/CLKDIV01A/SCH/clkdiv.pdf
3397 3982 d 21 h kaklik /Modules/Clock/CLKDIV01A/SCH/ Diff
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
3396 3982 d 22 h kaklik /Modules/Clock/CLKDIV01A/ vygenerovanitechnologickych vystupu Diff
/Modules/Clock/CLKDIV01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO
/Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3395 3982 d 22 h kaklik /Modules/Clock/CLKDIV01A/ Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc
3394 3982 d 23 h kaklik /Modules/Clock/CLKDIV01A/ ulozeni verze pred otocenim konektoru. Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
3393 3983 d 0 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zapojeni diff paru. Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3392 3983 d 0 h kaklik /Modules/Clock/CLKDIV01A/PCB/ Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3391 3983 d 0 h kaklik /Modules/Clock/CLKDIV01A/PCB/ prvni slusne zapojeni diferencialnich paru. Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3389 3983 d 1 h kaklik /Modules/Clock/CLKDIV01A/PCB/ otoceni a srovnani konektoru Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3388 3983 d 1 h kaklik /Modules/Clock/CLKDIV01A/ Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
3387 3983 d 2 h kaklik /Modules/Clock/CLKDIV01A/ Diff
/Modules/Clock/CLKDIV01A/SCH/clkdiv.pdf
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
3386 3983 d 6 h kaklik /Modules/Clock/CLKDIV01A/ aktualizace podle noveho navrhu. Diff
/Modules/Clock/CLKDIV01A/pdf/NB6L239.PDF
/Modules/Clock/CLKDIV01A/pdf/sy100s834-l.pdf
/Modules/Clock/CLKDIV01A/SCH/navrh.PDF
3385 3983 d 21 h kaklik /Modules/Clock/CLKDIV01A/PCB/ zkouska zaroutovatelnosti. Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
3384 3983 d 22 h kaklik /Modules/Clock/CLKDIV01A/ prvni schema a plosny spoj modulu delicky. Diff
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc
/Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj
3383 3984 d 0 h kaklik /Modules/ zalozeni noveho modulu pro delicku hodin. Diff
/Modules/CPLD_FPGA/S6AN01A/SCH/navrh.PDF
/Modules/Clock/CLKDIV01A
/Modules/Clock/CLKDIV01A/CAM_AMA
/Modules/Clock/CLKDIV01A/CAM_DOC
/Modules/Clock/CLKDIV01A/CAM_PROFI
/Modules/Clock/CLKDIV01A/CAM_PROFI/Preview.gvp
/Modules/Clock/CLKDIV01A/DOC
/Modules/Clock/CLKDIV01A/DOC/HTML
/Modules/Clock/CLKDIV01A/DOC/SRC
/Modules/Clock/CLKDIV01A/PCB
/Modules/Clock/CLKDIV01A/PrjInfo.txt
/Modules/Clock/CLKDIV01A/SCH
/Modules/Clock/CLKDIV01A/SCH/navrh.PDF
/Modules/Clock/CLKDIV01A/SW
/Modules/Clock/CLKDIV01A/pdf
/Modules/Clock/CLKDIV01A/pdf/sy100s834-l.pdf
3358 4019 d 3 h kaklik / vylepseni dokumentace Diff
/Designs/Measuring_instruments/GM_counter/DOC/GM_counter.pdf
/Modules/Clock/CLKGEN01B/SW/DG8SAQ synthesiser_Emulator/firmware.hex
/Modules/Clock/CLKGEN01B/SW/DG8SAQ synthesiser_Emulator/USB Device - MCHPUSB - Generic Driver - C18 - PIC18F4550.hex
/Designs/Measuring_instruments/GM_counter/DOC/SRC/GM_counter.tex
3106 4149 d 18 h kaklik / vygenerovani QR kodu v modulech, ktere maji existujici soubor PrjInfo.txt Diff
/Modules/ADconverters/ADCmonoPPI01A/DOC/SRC/img
/Modules/ADconverters/ADCmonoPPI01A/DOC/SRC/img/ADCmonoPPI01A_QRcode.png
/Modules/ADconverters/ADCmonoSPI01A/DOC/SRC/img
/Modules/ADconverters/ADCmonoSPI01A/DOC/SRC/img/ADCmonoSPI01A_QRcode.png
/Modules/ADconverters/ADCmonoSPI01B/DOC/SRC/img
/Modules/ADconverters/ADCmonoSPI01B/DOC/SRC/img/ADCmonoSPI01B_QRcode.png
/Modules/ADconverters/ADCoctoSPI01A/DOC/SRC/img
/Modules/ADconverters/ADCoctoSPI01A/DOC/SRC/img/ADCoctoSPI01A_QRcode.png
/Modules/ARM/ODroid-X2/DOC/SRC
/Modules/ARM/ODroid-X2/DOC/SRC/img
/Modules/ARM/ODroid-X2/DOC/SRC/img/ODroid-X2_QRcode.png
/Modules/ARM/STM32F10xRxT/DOC/SRC/img
/Modules/ARM/STM32F10xRxT/DOC/SRC/img/STM32F10xRxT_QRcode.png
/Modules/AVR/ATmega801A/DOC/SRC/img
/Modules/AVR/ATmega801A/DOC/SRC/img/ATmega801A_QRcode.png
/Modules/AVR/ATmega801B/DOC/SRC/img
/Modules/AVR/ATmega801B/DOC/SRC/img/ATmega801B_QRcode.png
/Modules/AVR/ATmega8DIL01A/DOC/SRC/img
/Modules/AVR/ATmega8DIL01A/DOC/SRC/img/ATmega8DIL01A_QRcode.png
/Modules/AVR/ATmegaTQ10001A/DOC/SRC/img
/Modules/AVR/ATmegaTQ10001A/DOC/SRC/img/ATmegaTQ10001A_QRcode.png
/Modules/AVR/ATmegaTQ3201A/DOC/SRC/img
/Modules/AVR/ATmegaTQ3201A/DOC/SRC/img/ATmegaTQ3201A_QRcode.png
/Modules/AVR/ATmegaTQ4401A/DOC/SRC/img
/Modules/AVR/ATmegaTQ4401A/DOC/SRC/img/ATmegaTQ4401A_QRcode.png
/Modules/AVR/ATmegaTQ6401A/DOC/SRC/img
/Modules/AVR/ATmegaTQ6401A/DOC/SRC/img/ATmegaTQ6401A_QRcode.png
/Modules/AVR/ATprogISPUSB01A/DOC/SRC/img
/Modules/AVR/ATprogISPUSB01A/DOC/SRC/img/ATprogISPUSB01A_QRcode.png
/Modules/AVR/ATprogISPUSB02A/DOC/SRC/img
/Modules/AVR/ATprogISPUSB02A/DOC/SRC/img/ATprogISPUSB02A_QRcode.png
/Modules/AVR/ATtinySO801A/DOC/SRC
/Modules/AVR/ATtinySO801A/DOC/SRC/img
/Modules/AVR/ATtinySO801A/DOC/SRC/img/ATtinySO801A_QRcode.png
/Modules/AVR/ATtinySO801B/DOC/SRC/img
/Modules/AVR/ATtinySO801B/DOC/SRC/img/ATtinySO801B_QRcode.png
/Modules/AVR/Text_ATosc/DOC/SRC/img
/Modules/AVR/Text_ATosc/DOC/SRC/img/Text_ATosc_QRcode.png
/Modules/AVR/Text_Prog/DOC/SRC/img
/Modules/AVR/Text_Prog/DOC/SRC/img/Text_Prog_QRcode.png
/Modules/Audio/AD1881A01A/DOC/SRC/img
/Modules/Audio/AD1881A01A/DOC/SRC/img/AD1881A01A_QRcode.png
/Modules/Audio/LM38601A/DOC/SRC/img
/Modules/Audio/LM38601A/DOC/SRC/img/LM38601A_QRcode.png
/Modules/Audio/MBA81001A/DOC/SRC/img
/Modules/Audio/MBA81001A/DOC/SRC/img/MBA81001A_QRcode.png
/Modules/Audio/MIC01A/DOC/SRC/img
/Modules/Audio/MIC01A/DOC/SRC/img/MIC01A_QRcode.png
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/img
/Modules/CPLD_FPGA/S3AN01A/DOC/SRC/img/S3AN01A_QRcode.png
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/img
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/img/S3AN01B_QRcode.png
/Modules/Clock/CLKGEN01A/DOC/SRC/img
/Modules/Clock/CLKGEN01A/DOC/SRC/img/CLKGEN01A_QRcode.png
/Modules/Clock/CLKGEN01B/DOC/SRC/img
/Modules/Clock/CLKGEN01B/DOC/SRC/img/CLKGEN01B_QRcode.png
/Modules/Clock/CLKHUB01A/DOC/SRC/img
/Modules/Clock/CLKHUB01A/DOC/SRC/img/CLKHUB01A_QRcode.png
/Modules/Clock/CLKHUB02A/DOC/SRC/img
/Modules/Clock/CLKHUB02A/DOC/SRC/img/CLKHUB02A_QRcode.png
/Modules/CommIR/IRDA01A/DOC
/Modules/CommIR/IRDA01A/DOC/SRC
/Modules/CommIR/IRDA01A/DOC/SRC/img
/Modules/CommIR/IRDA01A/DOC/SRC/img/IRDA01A_QRcode.png
/Modules/CommIR/TXIR01A/DOC/SRC/img
/Modules/CommIR/TXIR01A/DOC/SRC/img/TXIR01A_QRcode.png
/Modules/CommIR/TXIR01B/DOC
/Modules/CommIR/TXIR01B/DOC/SRC
/Modules/CommIR/TXIR01B/DOC/SRC/img
/Modules/CommIR/TXIR01B/DOC/SRC/img/TXIR01B_QRcode.png
/Modules/CommRF/ANT01/DOC/SRC
/Modules/CommRF/ANT01/DOC/SRC/img
/Modules/CommRF/ANT01/DOC/SRC/img/ANT01_QRcode.png
/Modules/CommRF/BP01A/DOC/SRC/img/BP01A_QRcode.png
/Modules/CommRF/GB01A/DOC/SRC/img/GB01A_QRcode.png
/Modules/CommRF/LNA01A/DOC/SRC/img
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/Modules/Universal/UNIUNI01A/DOC/SRC/img
/Modules/Universal/UNIUNI01A/DOC/SRC/img/UNIUNI01A_QRcode.png
/Modules/Universal/UNIUNI02A/DOC/SRC/img
/Modules/Universal/UNIUNI02A/DOC/SRC/img/UNIUNI02A_QRcode.png
/Modules/Universal/UNIUNI03A/DOC/SRC/img
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/ServerPrivate/Tools/generate_QR_all.sh
2749 4285 d 19 h kaklik /Modules/Clock/CLKHUB02A/SCH/ zapis variant modulu. Diff
/Modules/Clock/CLKHUB02A/SCH/CLKHUB_LVDS.BOM
/Modules/Clock/CLKHUB02A/SCH/CLKHUB_LVPECL.BOM
2720 4305 d 22 h kaklik /Modules/Clock/CLKHUB02A/DOC/ oprava zasadnich chyb v dokumentaci. Diff
/Modules/Clock/CLKHUB02A/DOC/CLKHUB02A.cs.pdf
/Modules/Clock/CLKHUB02A/DOC/SRC/CLKHUB02A.cs.tex
2708 4326 d 5 h kaklik /Modules/Clock/ Diff
/Modules/Clock/CLKGEN01B/CAM_DOC/DRILL.pdf
/Modules/Clock/CLKHUB02A/CAM_DOC/DRILL.pdf
2628 4402 d 18 h jacho /Modules/Clock/CLKHUB02A/ Diff
/Modules/Clock/CLKHUB02A/PrjInfo.txt
2627 4402 d 18 h jacho /Modules/ Diff
/Modules/Clock/CLKHUB02A/PrjInfo.txt
/Modules/CommRF/LNA01A/PrjInfo.txt
2626 4405 d 4 h kaklik /Modules/Clock/CLKHUB02A/ uklid v dokumentaci. Diff
/Modules/Clock/CLKHUB02A/DOC/CLKHUB02A.cs.pdf
/Modules/Clock/CLKHUB02A/pdf
/Modules/Clock/CLKHUB02A/pdf/CDCLVP111.pdf
/Modules/Clock/CLKHUB02A/DOC/CLKHUB02A.pdf