1809 |
4954 d 9 h |
kaklik |
/ |
drobné úpravy a vygenerování technologických výstupů |
Diff |
1808 |
4954 d 23 h |
kaklik |
/Modules/Clock/CLKGEN01B/PCB/ |
přidání prokovů |
Diff |
1718 |
5005 d 6 h |
kaklik |
/ |
Opravy a doplneni |
Diff |
1713 |
5007 d 10 h |
kaklik |
/ |
priprava novych modulu. |
Diff |
1712 |
5008 d 0 h |
kaklik |
/Modules/Clock/CLKGEN01B/ |
|
Diff |
1711 |
5008 d 0 h |
kaklik |
/Modules/Clock/CLKGEN01B/ |
uprava zemeni a rozlozeni soucastek |
Diff |
1691 |
5034 d 4 h |
kaklik |
/ |
Fifmware zeditovan tak, aby nepotreboval bootloader. |
Diff |
1668 |
5047 d 1 h |
kaklik |
/Modules/ |
nove moduly |
Diff |
1666 |
5052 d 13 h |
kaklik |
/Modules/ |
Zalozeni noveho typu modulu pro Time to Digital conversion |
Diff |
1661 |
5062 d 2 h |
kaklik |
/Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ |
do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. |
Diff |
1572 |
5124 d 15 h |
kaklik |
/ |
poznamky problemu |
Diff |
1555 |
5153 d 0 h |
kaklik |
/Modules/Clock/ |
pokus s ladenim delky spoju |
Diff |
1548 |
5163 d 11 h |
kaklik |
/Modules/Clock/ |
aktualizace popisu modulů. |
Diff |
1547 |
5163 d 12 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
Fotky LO. |
Diff |
1546 |
5166 d 9 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
seznam chyb. |
Diff |
1545 |
5166 d 10 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
potisk |
Diff |
1544 |
5167 d 11 h |
kaklik |
/ |
|
Diff |
1543 |
5167 d 12 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
vymena CAM vystupu |
Diff |
1542 |
5167 d 13 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
generovani technologickych dat. |
Diff |
1541 |
5168 d 1 h |
kaklik |
/Modules/Clock/CLKGEN01A/PCB/ |
|
Diff |
1540 |
5168 d 2 h |
kaklik |
/Modules/Clock/CLKGEN01A/PCB/ |
|
Diff |
1539 |
5168 d 2 h |
kaklik |
/Modules/Clock/CLKGEN01A/PCB/ |
|
Diff |
1531 |
5185 d 1 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
pridani chybejicich terminacnich odporu.. |
Diff |
1530 |
5185 d 8 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
Temer konecna verze PCB pro Si570. Respektive Si5XX |
Diff |
1529 |
5185 d 10 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. |
Diff |
1528 |
5185 d 11 h |
kaklik |
/Modules/ |
|
Diff |
1527 |
5185 d 12 h |
kaklik |
/Modules/Clock/CLKGEN01A/SCH/ |
pridani zapomenutych der a fidu znacek |
Diff |
1526 |
5186 d 3 h |
kaklik |
/Modules/Clock/CLKGEN01A/PCB/ |
|
Diff |
1525 |
5186 d 3 h |
kaklik |
/Modules/Clock/CLKGEN01A/PCB/ |
zacatek prace na plosnem spoji. |
Diff |
1524 |
5186 d 8 h |
kaklik |
/Modules/Clock/CLKGEN01A/SCH/ |
export dat pro PADs. |
Diff |
1523 |
5186 d 8 h |
kaklik |
/Modules/Clock/CLKGEN01A/SCH/ |
|
Diff |
1522 |
5187 d 6 h |
kaklik |
/Modules/Clock/CLKGEN01A/ |
pridani zdroje |
Diff |
1521 |
5189 d 3 h |
kaklik |
/Modules/ |
schema modulu pro generovani hodin. |
Diff |
1519 |
5190 d 4 h |
kaklik |
/Modules/ |
popisek modulu. |
Diff |
1518 |
5190 d 4 h |
kaklik |
/Modules/Clock/ |
datasheety pouzitych obvodu jsou misto dokumentace. |
Diff |
1517 |
5190 d 5 h |
kaklik |
/Modules/ |
presunuti a vytvoreni noveho modulu pro hodiny |
Diff |