Rev Age Author Path Log message Diff
1827 5015 d 14 h kaklik /Modules/Clock/CLKGEN01B/DOC/ opraven překlep Diff
1824 5016 d 17 h kaklik / vygeneroavany 3D nahledy Diff
1823 5016 d 17 h kaklik /Modules/Clock/CLKGEN01B/SCH/ vygenerovan seznam materialu Diff
1814 5023 d 18 h kaklik / vygenerovani nahledu Diff
1813 5023 d 18 h kaklik / vygenerovani technologickych vystupu. Diff
1811 5024 d 5 h kaklik / Diff
1810 5024 d 8 h kaklik / aktualizace odmaskování. Odstaraněno odmaskování VIA Diff
1809 5024 d 15 h kaklik / drobné úpravy a vygenerování technologických výstupů Diff
1808 5025 d 5 h kaklik /Modules/Clock/CLKGEN01B/PCB/ přidání prokovů Diff
1718 5075 d 12 h kaklik / Opravy a doplneni Diff
1713 5077 d 15 h kaklik / priprava novych modulu. Diff
1712 5078 d 5 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5078 d 6 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1691 5104 d 9 h kaklik / Fifmware zeditovan tak, aby nepotreboval bootloader. Diff
1668 5117 d 7 h kaklik /Modules/ nove moduly Diff
1666 5122 d 19 h kaklik /Modules/ Zalozeni noveho typu modulu pro Time to Digital conversion Diff
1661 5132 d 8 h kaklik /Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. Diff
1572 5194 d 21 h kaklik / poznamky problemu Diff
1555 5223 d 5 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5233 d 17 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5233 d 18 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5236 d 14 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5236 d 16 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5237 d 17 h kaklik / Diff
1543 5237 d 17 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5237 d 18 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5238 d 7 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5238 d 7 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5238 d 7 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5255 d 7 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5255 d 14 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5255 d 15 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5255 d 16 h kaklik /Modules/ Diff
1527 5255 d 18 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5256 d 8 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5256 d 9 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5256 d 13 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5256 d 14 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
1522 5257 d 11 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
1521 5259 d 9 h kaklik /Modules/ schema modulu pro generovani hodin. Diff