Rev Age Author Path Log message Diff
1827 4946 d 6 h kaklik /Modules/Clock/CLKGEN01B/DOC/ opraven překlep Diff
1824 4947 d 9 h kaklik / vygeneroavany 3D nahledy Diff
1823 4947 d 9 h kaklik /Modules/Clock/CLKGEN01B/SCH/ vygenerovan seznam materialu Diff
1814 4954 d 10 h kaklik / vygenerovani nahledu Diff
1813 4954 d 10 h kaklik / vygenerovani technologickych vystupu. Diff
1811 4954 d 21 h kaklik / Diff
1810 4955 d 0 h kaklik / aktualizace odmaskování. Odstaraněno odmaskování VIA Diff
1809 4955 d 7 h kaklik / drobné úpravy a vygenerování technologických výstupů Diff
1808 4955 d 21 h kaklik /Modules/Clock/CLKGEN01B/PCB/ přidání prokovů Diff
1718 5006 d 4 h kaklik / Opravy a doplneni Diff
1713 5008 d 7 h kaklik / priprava novych modulu. Diff
1712 5008 d 21 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5008 d 22 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1691 5035 d 1 h kaklik / Fifmware zeditovan tak, aby nepotreboval bootloader. Diff
1668 5047 d 23 h kaklik /Modules/ nove moduly Diff
1666 5053 d 11 h kaklik /Modules/ Zalozeni noveho typu modulu pro Time to Digital conversion Diff
1661 5063 d 0 h kaklik /Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. Diff
1572 5125 d 13 h kaklik / poznamky problemu Diff
1555 5153 d 21 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5164 d 9 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5164 d 10 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5167 d 6 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5167 d 8 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5168 d 9 h kaklik / Diff
1543 5168 d 9 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5168 d 10 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5168 d 23 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5168 d 23 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5168 d 23 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5185 d 23 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5186 d 6 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5186 d 7 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5186 d 8 h kaklik /Modules/ Diff
1527 5186 d 10 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5187 d 0 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5187 d 1 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5187 d 5 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
1523 5187 d 6 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
1522 5188 d 3 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
1521 5190 d 1 h kaklik /Modules/ schema modulu pro generovani hodin. Diff