1814 |
4957 d 4 h |
kaklik |
/ |
vygenerovani nahledu |
Diff |
1813 |
4957 d 4 h |
kaklik |
/ |
vygenerovani technologickych vystupu. |
Diff |
1811 |
4957 d 15 h |
kaklik |
/ |
|
Diff |
1810 |
4957 d 17 h |
kaklik |
/ |
aktualizace odmaskování. Odstaraněno odmaskování VIA |
Diff |
1809 |
4958 d 1 h |
kaklik |
/ |
drobné úpravy a vygenerování technologických výstupů |
Diff |
1808 |
4958 d 15 h |
kaklik |
/Modules/Clock/CLKGEN01B/PCB/ |
přidání prokovů |
Diff |
1802 |
4960 d 2 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
upravy ve vyliti medi. |
Diff |
1801 |
4960 d 3 h |
kaklik |
/Modules/Sensors/ |
prejmenovani dokumentacni slozky GSENSE01A |
Diff |
1800 |
4960 d 3 h |
kaklik |
/Modules/Sensors/MMA7260/DOC/ |
|
Diff |
1799 |
4960 d 3 h |
kaklik |
/Modules/PIC/PICPROGUSB02A/DOC/ |
oprava nadpisu |
Diff |
1798 |
4964 d 0 h |
kaklik |
/ |
aktualizace schemat v PDF. |
Diff |
1797 |
4967 d 4 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
uprava potisku |
Diff |
1796 |
4967 d 4 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
aktualizace vyrobnich dat. |
Diff |
1795 |
4967 d 15 h |
kaklik |
/Modules/CommSerial/ETH01A/ |
zacatek navrhu PCB. |
Diff |
1794 |
4967 d 18 h |
kaklik |
/Modules/CommSerial/ETH01A/SCH/ |
doklesleno schema. |
Diff |
1793 |
4968 d 21 h |
kaklik |
/Modules/CommSerial/ETH01A/SCH/ |
dokresleni schema casti na PoE.
Jeste je treba prekleslit pripojeni RJ45 konektoru. |
Diff |
1792 |
4968 d 22 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/SCH/ |
Ještě pracovní knihovna projektu S3AN01A |
Diff |
1791 |
4968 d 22 h |
miho |
/Modules/CPLD_FPGA/S3AN01A/ |
Created FPGA module (school board) for XILINX Spartan 3 XC3S50AN gate array S3AN01A |
Diff |
1790 |
4968 d 22 h |
miho |
/Modules/ |
Přejmenování podstromu CPLD na CPLD_FPGA |
Diff |
1789 |
4969 d 4 h |
miho |
/ |
Vygenerované podklady pro amatérskou výrobu plošných spojů. |
Diff |
1786 |
4975 d 16 h |
kaklik |
/Modules/Translators/TTLPECL01A/ |
vygenerovani technologickych vystupu |
Diff |
1785 |
4975 d 16 h |
kaklik |
/Modules/Translators/TTLPECL01A/PCB/ |
|
Diff |
1784 |
4975 d 17 h |
kaklik |
/ |
zacatek navrhu spoje. |
Diff |
1783 |
4975 d 21 h |
kaklik |
/Modules/Translators/TTLPECL01A/DOC/ |
Zalozena nоvá třída modulů pro převod signálových úrovní. |
Diff |
1782 |
4975 d 21 h |
kaklik |
/ |
presunuti mezi nove zavedeny typ modulu. |
Diff |
1781 |
4975 d 23 h |
kaklik |
/ |
Zalozena nоvá třída modulů pro převod signálových úrovní. |
Diff |
1780 |
4976 d 17 h |
kaklik |
/ |
vytvoren modul pro vlhkostni cidlo. |
Diff |
1779 |
4976 d 18 h |
kaklik |
/Modules/Sensors/HUM01A/PCB/ |
zakladni verze PCB |
Diff |
1778 |
4976 d 20 h |
kaklik |
/Modules/ |
zalozen novy modul - na mereni vlhkosti. |
Diff |
1775 |
4979 d 21 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
TDC nwmwri ani v modu 1 |
Diff |
1774 |
4980 d 2 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
pridani mereni teploty pomoci ccidla DS18B20 |
Diff |
1767 |
4980 d 20 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
pridani zdrojaku pro teplomer |
Diff |
1766 |
4984 d 0 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
dokonceni uprav PCB pro vyrobu. |
Diff |
1765 |
4984 d 4 h |
kaklik |
/Modules/ARM/STM32F10xRxT/PCB/ |
pridani technologickych znacek. |
Diff |
1764 |
4984 d 15 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
aktualizace oprav chyb |
Diff |
1763 |
4984 d 17 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
přegenerování technologických výstupů |
Diff |
1762 |
4984 d 17 h |
kaklik |
/Modules/ARM/STM32F10xRxT/ |
uklid ve slozkach modulu. |
Diff |
1760 |
4984 d 17 h |
kaklik |
/Modules/TDC/GP201A/SW/PICinterface/ |
zmena absolutnich cest v projektu na relativni. |
Diff |
1759 |
4985 d 15 h |
kakl |
/Modules/TDC/GP201A/SW/PICinterface/ |
implementace MR2. TDC ale nereaguje na stop impuls. |
Diff |
1758 |
4985 d 19 h |
kakl |
/Modules/TDC/GP201A/SW/PICinterface/ |
znicializovany nastaveni registru |
Diff |