Rev Age Author Path Log message Diff
1950 4962 d 19 h miho /Modules/CPLD_FPGA/S3AN01B/ S3AN01B doplněny obrázky (pro dokumentaci) Diff
1947 4963 d 4 h kaklik / prejmenovani souboru podle konvence Diff
1946 4963 d 9 h kaklik /Modules/PIC/PIC18F8xTQ8001A/DOC/ aktualizace dokumentace Diff
1941 4965 d 17 h kaklik /Modules/H_Bridge/MPC17511HB01A/DOC/ oprava dokumentace Diff
1939 4967 d 15 h kaklik /Modules/Clock/CLKGEN01B/ preklad Diff
1937 4969 d 12 h miho /Modules/CPLD_FPGA/S3AN01B/PCB/ Aktualizovány hodnoty součástek (synchronizace se schématem). Diff
1936 4969 d 12 h miho /Modules/CPLD_FPGA/S3AN01B/SCH/ Aktualizovaný seznam součástek a cenový přehled (nutno doplnit reálnou cenu PCB z faktury). Diff
1935 4969 d 18 h miho /Modules/CPLD_FPGA/S3AN01B/SCH/ Aktualizace schématu (formální změny). Pracovní verze seznamu součástek. Diff
1934 4970 d 8 h kaklik /Modules/Clock/CLKGEN01B/DOC/ kus anglickeho prekladu Diff
1933 4970 d 8 h kaklik /Modules/Clock/CLKGEN01B/DOC/ kus anglickeho prekladu Diff
1932 4972 d 12 h kaklik /Modules/Clock/CLKGEN01B/DOC/ prejmenovani podle konvence Diff
1931 4975 d 3 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ testovani TDC Diff
1930 4975 d 8 h kaklik / preklad kodu Diff
1914 4985 d 12 h kaklik /Modules/CommSerial/ETH02A/ Vygenerovani potisku Diff
1913 4985 d 12 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1912 4985 d 12 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1911 4986 d 6 h kaklik /Modules/ Vyvoj tistaku pro ETHERNET. Diff
1910 4987 d 7 h kaklik /Modules/ARM/STM32F10xRxT/ nalezene chyby Diff
1908 4989 d 2 h klimma /Modules/PowerSupply/klimma/ Diff
1907 4989 d 6 h kaklik /Modules/PowerSupply/MC3406301A/pdf/ dokumentace Diff
1906 4990 d 18 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A doplnění obrázků Diff
1899 4991 d 10 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A je již zastaralá konstrukce Diff
1898 4991 d 10 h miho /Modules/CPLD_FPGA/S3AN01B/ S3AN01B revize desky S3AN01A (s opravami) Diff
1897 4991 d 10 h miho /Modules/CPLD_FPGA/S3AN01A/SCH/ S3AN01A doplněny texty Diff
1896 4995 d 8 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. Diff
1894 4996 d 2 h kaklik /Modules/CommSerial/ETH02A/ Diff
1892 5005 d 3 h kaklik /Modules/CommSerial/ETH02A/ zacatek kresleni PCB Diff
1891 5005 d 4 h kaklik /Modules/ schema modulu s ehternet konektorem. Diff
1890 5007 d 8 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1888 5007 d 9 h kaklik / vygenerevani osazovaku Diff
1887 5012 d 8 h kaklik /Modules/CommSerial/ založen nový modul s ethernet konektorem. Diff
1886 5013 d 4 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Prvni verze, co neco meri. Diff
1883 5016 d 4 h jacho /Modules/ pridani odkazu na UST Diff
1882 5016 d 4 h jacho /Modules/ADconverters/ADCmonoSPI01B/ pridani odkazu na ust Diff
1879 5018 d 8 h jacho / Diff
1878 5018 d 9 h jacho /Modules/AVR/ Diff
1877 5018 d 9 h jacho /Modules/AVR/ATmega801B/ Diff
1876 5018 d 9 h jacho /Modules/AVR/ATmegaTQ4401A/ Diff
1875 5018 d 9 h jacho /Modules/AVR/ATmega801B/ Diff
1874 5018 d 10 h kaklik /Modules/CommSerial/ETH01A/SCH/ vylepseni odruseni Diff