Rev 1957 – kaklik – 185 d 5 h (2024-02-19 21:55:10)
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Rev 1957
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1937
4881 d 13 h
miho
/Modules/CPLD_FPGA/S3AN01B/PCB/
Aktualizovány hodnoty součástek (synchronizace se schématem).
Diff
1936
4881 d 14 h
miho
/Modules/CPLD_FPGA/S3AN01B/SCH/
Aktualizovaný seznam součástek a cenový přehled (nutno doplnit reálnou cenu PCB z faktury).
Diff
1935
4881 d 19 h
miho
/Modules/CPLD_FPGA/S3AN01B/SCH/
Aktualizace schématu (formální změny). Pracovní verze seznamu součástek.
Diff
1934
4882 d 10 h
kaklik
/Modules/Clock/CLKGEN01B/DOC/
kus anglickeho prekladu
Diff
1933
4882 d 10 h
kaklik
/Modules/Clock/CLKGEN01B/DOC/
kus anglickeho prekladu
Diff
1932
4884 d 13 h
kaklik
/Modules/Clock/CLKGEN01B/DOC/
prejmenovani podle konvence
Diff
1931
4887 d 5 h
kaklik
/Modules/TDC/GP201A/SW/PICinterface/
testovani TDC
Diff
1930
4887 d 9 h
kaklik
/
preklad kodu
Diff
1929
4887 d 19 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
dokumentace
Diff
1928
4889 d 6 h
kaklik
/
dokumentace
Diff
1927
4889 d 6 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
dokumentace
Diff
1926
4889 d 7 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
dokumentace
Diff
1925
4889 d 7 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
dokumentace
Diff
1924
4889 d 7 h
kaklik
/Articles/HowTo/Guide/
dokumentace
Diff
1923
4889 d 7 h
kaklik
/Articles/HowTo/
dokumentace
Diff
1922
4889 d 7 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
dokumentace
Diff
1921
4891 d 13 h
kaklik
/Articles/HowTo/Guide/DOC/HTML/
navod pro zacatecniky
Diff
1920
4892 d 5 h
kaklik
/
nova dokumentace
Diff
1919
4893 d 13 h
kaklik
/
Smazani oznameni o pretizeni.
Diff
1918
4893 d 13 h
root
/
commit hlaseni o pretizeni
Diff