Rev Age Author Path Log message Diff
2897 4089 d 13 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/ Opet povoleny interrupty. Diff
2896 4089 d 14 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/bootloader887/ Prepisovaly se NOPy na zacatku. Diff
2895 4090 d 20 h jacho /Modules/ Diff
2894 4090 d 20 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2893 4090 d 22 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2892 4090 d 22 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2891 4090 d 23 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2890 4090 d 23 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2889 4090 d 23 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2888 4090 d 23 h jacho /Modules/ Diff
2887 4091 d 12 h kaklik /Modules/PowerSupply/LION1CELL01A/ konkretizace pozadavku Diff
2886 4091 d 12 h kaklik / zapis dalsich pozadavku. Diff
2885 4091 d 18 h jacho /Modules/PowerSupply/LION1CELL01A/pdf/ Diff
2884 4091 d 18 h jacho /Modules/PowerSupply/LION1CELL01A/ Diff
2883 4092 d 21 h jacho /Modules/ Diff
2882 4093 d 0 h jacho /Modules/ Diff
2881 4096 d 13 h jacho /Modules/ Diff
2880 4096 d 17 h miho /Designs/LOCKTM01A/ Zárodek elektrického zámku (konstrukce pro kroužek) Diff
2879 4097 d 2 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Oprava M1 (maskování FIDU značek). Diff
2878 4101 d 1 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Posunul jsem některé SMD součástky aby se nedotýkaly otvory v masce. Diff