Rev Age Author Path Log message Diff
1544 5188 d 4 h kaklik / Diff
1543 5188 d 4 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5188 d 5 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5188 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5188 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5188 d 18 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5191 d 19 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5192 d 1 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5192 d 16 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5201 d 22 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5201 d 22 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5201 d 23 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5205 d 18 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5206 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5206 d 2 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5206 d 3 h kaklik /Modules/ Diff
1527 5206 d 5 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5206 d 19 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5206 d 20 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5207 d 0 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff