Rev Age Author Path Log message Diff
1544 5101 d 1 h kaklik / Diff
1543 5101 d 1 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5101 d 2 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5101 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5101 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5101 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5104 d 16 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5104 d 22 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5105 d 13 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5114 d 19 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5114 d 19 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5114 d 20 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5118 d 15 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5118 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5118 d 23 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5119 d 0 h kaklik /Modules/ Diff
1527 5119 d 2 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5119 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5119 d 17 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5119 d 21 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff