Rev Age Author Path Log message Diff
1551 5070 d 21 h kaklik / prvni SDR konstrukce. Diff
1548 5080 d 0 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5080 d 1 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5082 d 22 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5082 d 23 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5084 d 0 h kaklik / Diff
1543 5084 d 1 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5084 d 2 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5084 d 14 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5084 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5084 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1538 5087 d 15 h kaklik /Modules/Clock/ Rozhodnuti pouzit pro CLKHUB jinou soucastku, protoze AD95010 nejde zapojit. Diff
1537 5087 d 22 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
1536 5088 d 12 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
1535 5097 d 19 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
1534 5097 d 19 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
1533 5097 d 19 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
1531 5101 d 14 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5101 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5101 d 23 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff