Rev Age Author Path Log message Diff
1933 4826 d 6 h kaklik /Modules/Clock/CLKGEN01B/DOC/ kus anglickeho prekladu Diff
1932 4828 d 9 h kaklik /Modules/Clock/CLKGEN01B/DOC/ prejmenovani podle konvence Diff
1931 4831 d 0 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ testovani TDC Diff
1930 4831 d 5 h kaklik / preklad kodu Diff
1914 4841 d 9 h kaklik /Modules/CommSerial/ETH02A/ Vygenerovani potisku Diff
1913 4841 d 9 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1912 4841 d 9 h kaklik /Modules/CommSerial/ETH02A/ prace na modulu pro ethernet Diff
1911 4842 d 3 h kaklik /Modules/ Vyvoj tistaku pro ETHERNET. Diff
1910 4843 d 4 h kaklik /Modules/ARM/STM32F10xRxT/ nalezene chyby Diff
1908 4844 d 23 h klimma /Modules/PowerSupply/klimma/ Diff
1907 4845 d 3 h kaklik /Modules/PowerSupply/MC3406301A/pdf/ dokumentace Diff
1906 4846 d 15 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A doplnění obrázků Diff
1899 4847 d 7 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A je již zastaralá konstrukce Diff
1898 4847 d 7 h miho /Modules/CPLD_FPGA/S3AN01B/ S3AN01B revize desky S3AN01A (s opravami) Diff
1897 4847 d 7 h miho /Modules/CPLD_FPGA/S3AN01A/SCH/ S3AN01A doplněny texty Diff
1896 4851 d 5 h miho /Modules/CPLD_FPGA/S3AN01A/ S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB. Diff
1894 4851 d 23 h kaklik /Modules/CommSerial/ETH02A/ Diff
1892 4861 d 0 h kaklik /Modules/CommSerial/ETH02A/ zacatek kresleni PCB Diff
1891 4861 d 1 h kaklik /Modules/ schema modulu s ehternet konektorem. Diff
1890 4863 d 5 h kaklik /Modules/ARM/STM32F10xRxT/ Diff