Rev Age Author Path Log message Diff
2554 4312 d 4 h jacho /Modules/HumanInterfaces/SW01A/ Diff
2553 4312 d 4 h jacho /Modules/HumanInterfaces/TRIM01A/ Diff
2552 4312 d 4 h jacho /Modules/HumanInterfaces/ Diff
2551 4312 d 6 h jacho /Modules/HumanInterfaces/LED01A/ Diff
2550 4312 d 6 h jacho /Modules/HumanInterfaces/LED01A/ Diff
2549 4312 d 7 h jacho /Modules/H_Bridge/HBSTEP01A/DOC/ Diff
2548 4312 d 7 h jacho /Modules/H_Bridge/HBSTEP01A/ Diff
2547 4312 d 10 h jacho /Modules/Universal/ Diff
2546 4312 d 11 h jacho /Modules/Universal/ Diff
2545 4312 d 12 h jacho /Modules/Universal/ALBASE1115/ Diff
2543 4318 d 1 h kaklik /Modules/CommSerial/USB232R01B/SW/FT_prog/ vytvoreni vzoru pro obsah EEPROM usb prevodniku. Diff
2542 4319 d 1 h jacho /Modules/Universal/ALBASE1115/ Diff
2541 4319 d 1 h kaklik /Modules/PowerSW/LDD01A/ informace k novym modulum. Diff
2540 4319 d 2 h jacho /Modules/Universal/ALBASE1521/ Diff
2539 4319 d 2 h jacho /Modules/Universal/ Diff
2538 4319 d 2 h jacho /Modules/Universal/ALBASE1521/ Diff
2537 4319 d 3 h jacho /Modules/Universal/ALBASE1521/ Diff
2536 4319 d 4 h jacho /Modules/Universal/ALBASE1521/ Diff
2534 4321 d 9 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/src/ Pridano generovani baliku pulzu a prepinatelna opakovaci frekvence na DOPSW. Vynulovani na TL. Diff
2533 4321 d 9 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/ Pridano automaticke verzovani. Diff