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Rev Age Author Path Log message Diff Changes
1537 5113 d 21 h kaklik /Modules/Clock/CLKHUB01A/ zacatek navrhu PCB Diff
/Modules/Clock/CLKHUB01A/PCB/CLKHUB.pcb
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.DSN
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.asc
1536 5114 d 12 h kaklik /Modules/Clock/CLKHUB01A/SCH/ Temer hotove schema Diff
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.asc
/Modules/Clock/CLKHUB01A/SCH/CLKHUB.DSN
1535 5123 d 19 h kaklik /Modules/CommSerial/USBIO01A/DOC/SRC/ fotky k modulu USBIO01A Diff
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Top_Big.jpg
1534 5123 d 19 h kaklik /Modules/CommSerial/USBIO01A/ fotky k modulu USBIO01A Diff
/Modules/CommSerial/USBIO01A/USBIO01A_Bottom_Small.jpg
/Modules/CommSerial/USBIO01A/USBIO01A_Top_Small.jpg
/Modules/CommSerial/USBIO01A/USBIO01A_Big.jpg
/Modules/CommSerial/USBIO01A/USBIO01A_Small.jpg
1533 5123 d 19 h kaklik /Modules/ADconverters/ADCmonoSPI01B/ fotky k modulu ADCmonoSPI01B Diff
/Modules/ADconverters/ADCmonoSPI01B/ADCmonoSPI01B_Bottom_Small.JPG
/Modules/ADconverters/ADCmonoSPI01B/DOC/SRC/ADCmonoSPI01B_Bottom_Big.JPG
/Modules/ADconverters/ADCmonoSPI01B/DOC/SRC/ADCmonoSPI01B_Top_Big.JPG
/Modules/ADconverters/ADCmonoSPI01B/DOC/SRC/ADCmonoSPI01A_Top_Big.JPG
/Modules/ADconverters/ADCmonoSPI01B/ADCmonoSPI01B_Top_Small.JPG
1532 5125 d 23 h kaklik /Designs/MRAKOMER4/DOC/ oprava vecne chyby v dokumentaci Diff
/Designs/MRAKOMER4/DOC/src/Mrakomer.en.tex
/Designs/MRAKOMER4/DOC/src/mrakomer.en.tex
/Designs/MRAKOMER4/DOC/Mrakomer.en.pdf
1531 5127 d 14 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1530 5127 d 21 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1529 5127 d 22 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1528 5128 d 0 h kaklik /Modules/ Diff
/Modules/Memory/SDcard01B
/Modules/Memory/SDcard01B/SCH
/Modules/Memory/SDcard01B/SCH/SDCARD.DSN
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
1527 5128 d 1 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1526 5128 d 15 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1525 5128 d 16 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
/Modules/Clock/CLKGEN01A/PCB/CLKGEN.pcb
1524 5128 d 20 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.asc
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
1523 5128 d 21 h kaklik /Modules/Clock/CLKGEN01A/SCH/ Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
1522 5129 d 18 h kaklik /Modules/Clock/CLKGEN01A/ pridani zdroje Diff
/Modules/Clock/CLKGEN01A/PrjInfo.txt
1521 5131 d 16 h kaklik /Modules/ schema modulu pro generovani hodin. Diff
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.DSN
/Modules/Clock/CLKGEN01A/SCH/CLKGEN.pdf
/Modules/ADconverters/ADCmonoPPI01A/SCH/ADCMONOPPI.DSN
/Modules/ADconverters/ADCmonoPPI01A/SCH/ADCmonoPPI.pdf
1520 5132 d 17 h kaklik /Modules/Clock/ popisek modulu. Diff
/Modules/Clock/clock_Small.jpg
/Modules/Clock/clock.jpg
1519 5132 d 17 h kaklik /Modules/ popisek modulu. Diff
/Modules/Clock/CLKGEN01A/PrjInfo.txt
/Modules/Clock/clock.jpg
/Modules/DirInfo.txt
1518 5132 d 17 h kaklik /Modules/Clock/ datasheety pouzitych obvodu jsou misto dokumentace. Diff
/Modules/Clock/CLKGEN01A/DOC/CLKGEN01A.pdf
/Modules/Clock/CLKHUB01A/DOC/CLKHUB01A.pdf