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Rev Age Author Path Log message Diff
1935 4820 d 5 h miho /Modules/CPLD_FPGA/S3AN01B/SCH/ Aktualizace schématu (formální změny). Pracovní verze seznamu součástek. Diff
1934 4820 d 20 h kaklik /Modules/Clock/CLKGEN01B/DOC/ kus anglickeho prekladu Diff
1933 4820 d 20 h kaklik /Modules/Clock/CLKGEN01B/DOC/ kus anglickeho prekladu Diff
1932 4822 d 23 h kaklik /Modules/Clock/CLKGEN01B/DOC/ prejmenovani podle konvence Diff
1931 4825 d 14 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ testovani TDC Diff
1930 4825 d 19 h kaklik / preklad kodu Diff
1929 4826 d 5 h kaklik /Articles/HowTo/Guide/DOC/HTML/ dokumentace Diff
1928 4827 d 16 h kaklik / dokumentace Diff
1927 4827 d 16 h kaklik /Articles/HowTo/Guide/DOC/HTML/ dokumentace Diff
1926 4827 d 16 h kaklik /Articles/HowTo/Guide/DOC/HTML/ dokumentace Diff
1925 4827 d 17 h kaklik /Articles/HowTo/Guide/DOC/HTML/ dokumentace Diff
1924 4827 d 17 h kaklik /Articles/HowTo/Guide/ dokumentace Diff
1923 4827 d 17 h kaklik /Articles/HowTo/ dokumentace Diff
1922 4827 d 17 h kaklik /Articles/HowTo/Guide/DOC/HTML/ dokumentace Diff
1921 4829 d 23 h kaklik /Articles/HowTo/Guide/DOC/HTML/ navod pro zacatecniky Diff
1920 4830 d 15 h kaklik / nova dokumentace Diff
1919 4831 d 22 h kaklik / Smazani oznameni o pretizeni. Diff
1918 4831 d 22 h root / commit hlaseni o pretizeni Diff
1917 4832 d 23 h kaklik /Designs/ opraveny chyby Diff
1916 4833 d 6 h kaklik /Web/ Diff