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Rev Age Author Path Log message Diff
2550 4440 d 14 h jacho /Modules/HumanInterfaces/LED01A/ Diff
2549 4440 d 15 h jacho /Modules/H_Bridge/HBSTEP01A/DOC/ Diff
2548 4440 d 16 h jacho /Modules/H_Bridge/HBSTEP01A/ Diff
2547 4440 d 19 h jacho /Modules/Universal/ Diff
2546 4440 d 19 h jacho /Modules/Universal/ Diff
2545 4440 d 20 h jacho /Modules/Universal/ALBASE1115/ Diff
2544 4444 d 10 h kakl /Designs/HAM Constructions/SDRX01B/SW/meteor_detect/ Nazvy soboru s obrazky jsou nove pojmenovavany podle casu. Diff
2543 4446 d 10 h kaklik /Modules/CommSerial/USB232R01B/SW/FT_prog/ vytvoreni vzoru pro obsah EEPROM usb prevodniku. Diff
2542 4447 d 9 h jacho /Modules/Universal/ALBASE1115/ Diff
2541 4447 d 10 h kaklik /Modules/PowerSW/LDD01A/ informace k novym modulum. Diff
2540 4447 d 10 h jacho /Modules/Universal/ALBASE1521/ Diff
2539 4447 d 10 h jacho /Modules/Universal/ Diff
2538 4447 d 11 h jacho /Modules/Universal/ALBASE1521/ Diff
2537 4447 d 11 h jacho /Modules/Universal/ALBASE1521/ Diff
2536 4447 d 12 h jacho /Modules/Universal/ALBASE1521/ Diff
2535 4448 d 17 h kaklik /Library/grafika/ vygenerovno logo v PDF formatu. Diff
2534 4449 d 18 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/src/ Pridano generovani baliku pulzu a prepinatelna opakovaci frekvence na DOPSW. Vynulovani na TL. Diff
2533 4449 d 18 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/ Pridano automaticke verzovani. Diff
2532 4450 d 16 h kaklik /Modules/PowerSW/LDD01A/SCH/ pregenerovani schema. Diff
2531 4450 d 16 h kaklik /Modules/PowerSW/LDD01A/ vygenerovany technologicke vystupy Diff