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Rev Age Author Path Log message Diff
2550 4310 d 15 h jacho /Modules/HumanInterfaces/LED01A/ Diff
2549 4310 d 16 h jacho /Modules/H_Bridge/HBSTEP01A/DOC/ Diff
2548 4310 d 16 h jacho /Modules/H_Bridge/HBSTEP01A/ Diff
2547 4310 d 20 h jacho /Modules/Universal/ Diff
2546 4310 d 20 h jacho /Modules/Universal/ Diff
2545 4310 d 21 h jacho /Modules/Universal/ALBASE1115/ Diff
2544 4314 d 11 h kakl /Designs/HAM Constructions/SDRX01B/SW/meteor_detect/ Nazvy soboru s obrazky jsou nove pojmenovavany podle casu. Diff
2543 4316 d 11 h kaklik /Modules/CommSerial/USB232R01B/SW/FT_prog/ vytvoreni vzoru pro obsah EEPROM usb prevodniku. Diff
2542 4317 d 10 h jacho /Modules/Universal/ALBASE1115/ Diff
2541 4317 d 11 h kaklik /Modules/PowerSW/LDD01A/ informace k novym modulum. Diff
2540 4317 d 11 h jacho /Modules/Universal/ALBASE1521/ Diff
2539 4317 d 11 h jacho /Modules/Universal/ Diff
2538 4317 d 12 h jacho /Modules/Universal/ALBASE1521/ Diff
2537 4317 d 12 h jacho /Modules/Universal/ALBASE1521/ Diff
2536 4317 d 13 h jacho /Modules/Universal/ALBASE1521/ Diff
2535 4318 d 18 h kaklik /Library/grafika/ vygenerovno logo v PDF formatu. Diff
2534 4319 d 18 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/src/ Pridano generovani baliku pulzu a prepinatelna opakovaci frekvence na DOPSW. Vynulovani na TL. Diff
2533 4319 d 19 h kakl /Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/ Pridano automaticke verzovani. Diff
2532 4320 d 17 h kaklik /Modules/PowerSW/LDD01A/SCH/ pregenerovani schema. Diff
2531 4320 d 17 h kaklik /Modules/PowerSW/LDD01A/ vygenerovany technologicke vystupy Diff