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Rev Age Author Path Log message Diff
2700 4195 d 7 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2699 4195 d 8 h kaklik /Modules/CommSerial/ETH01A/pdf/ ulozeni datasheetu od filtracni civky. Diff
2698 4195 d 10 h kaklik /Modules/PowerSupply/LION1CELL01A/pdf/Protect/ pridani datasheetu k ochrannemu obvodu. Diff
2697 4195 d 15 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/ Program mlab_xvcd.exe včetně zdrojáků. Obslužný program Xilinx Virtual Cable pro Windows a FTDI. Diff
2696 4195 d 18 h jacho /Modules/ Diff
2695 4196 d 17 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2694 4197 d 10 h jacho /Modules/ Diff
2693 4197 d 14 h jacho /Modules/ Diff
2692 4197 d 15 h kaklik /Modules/CommSerial/JTAGFT2232V02A/ zakladni prohlednuti noveho programatoru na J-tag Diff
2691 4199 d 14 h jacho /Modules/CommSerial/JTAGFT2232V02A/ Diff
2690 4200 d 8 h kaklik /Designs/ blokove schema prijimace pro koherentni mereni. Diff
2689 4200 d 10 h kaklik /Designs/HAM Constructions/PASDRX01A/SCH/ prekresleni blokoveho schema do realne konfigurace. Diff
2688 4200 d 11 h kaklik /Designs/HAM Constructions/ Pridani navrhu prijimace urceneho pro sfazovane antenni pole mnoha anten. Diff
2687 4202 d 7 h kaklik /Designs/HAM Constructions/ navrh blokoveho schema pro nove verze prijimace. Diff
2686 4202 d 8 h jacho /Modules/HumanInterfaces/TOUCHBOARD01A/SCH_PCB/ Diff
2685 4203 d 19 h kaklik /Modules/CommSerial/ETH01A/SCH/ Upravy terminacnich odporu ve schema. Diff
2684 4205 d 5 h kaklik /Modules/Sensors/HCS01A/ zalozeni dokumentacni slozky pro meric vysokych proudu. Diff
2683 4205 d 6 h kaklik /Modules/ uklid v dokumentaci. Diff
2682 4205 d 20 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/ Doplněny technologické a dokumentační výstupy XVC_FT220X01A, chybí návod, BOM a dávka pro naprogramování EEPROM. Diff
2681 4209 d 10 h miho /Modules/CPLD_FPGA/XILINX_XVC/ Oprava popisného souboru (formální změna) Diff