←Prev12Next→ Show All
Rev Age Author Path Log message Diff
2897 4125 d 7 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/ Opet povoleny interrupty. Diff
2896 4125 d 8 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/bootloader887/ Prepisovaly se NOPy na zacatku. Diff
2895 4126 d 14 h jacho /Modules/ Diff
2894 4126 d 14 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2893 4126 d 16 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2892 4126 d 16 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2891 4126 d 16 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2890 4126 d 17 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2889 4126 d 17 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2888 4126 d 17 h jacho /Modules/ Diff
2887 4127 d 6 h kaklik /Modules/PowerSupply/LION1CELL01A/ konkretizace pozadavku Diff
2886 4127 d 6 h kaklik / zapis dalsich pozadavku. Diff
2885 4127 d 12 h jacho /Modules/PowerSupply/LION1CELL01A/pdf/ Diff
2884 4127 d 12 h jacho /Modules/PowerSupply/LION1CELL01A/ Diff
2883 4128 d 15 h jacho /Modules/ Diff
2882 4128 d 18 h jacho /Modules/ Diff
2881 4132 d 7 h jacho /Modules/ Diff
2880 4132 d 11 h miho /Designs/LOCKTM01A/ Zárodek elektrického zámku (konstrukce pro kroužek) Diff
2879 4132 d 20 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Oprava M1 (maskování FIDU značek). Diff
2878 4136 d 19 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Posunul jsem některé SMD součástky aby se nedotýkaly otvory v masce. Diff