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Rev Age Author Path Log message Diff
2897 4121 d 3 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/ Opet povoleny interrupty. Diff
2896 4121 d 4 h kakl /Designs/Measuring_instruments/AWS01A/SW/PIC16F887/bootloader887/ Prepisovaly se NOPy na zacatku. Diff
2895 4122 d 10 h jacho /Modules/ Diff
2894 4122 d 11 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2893 4122 d 12 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2892 4122 d 12 h jacho /Modules/PowerSupply/TPS63036V01A/SCH_PCB/ Diff
2891 4122 d 13 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2890 4122 d 13 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2889 4122 d 13 h jacho /Modules/PowerSupply/LION1CELL01A/SCH_PCB/ Diff
2888 4122 d 14 h jacho /Modules/ Diff
2887 4123 d 2 h kaklik /Modules/PowerSupply/LION1CELL01A/ konkretizace pozadavku Diff
2886 4123 d 2 h kaklik / zapis dalsich pozadavku. Diff
2885 4123 d 9 h jacho /Modules/PowerSupply/LION1CELL01A/pdf/ Diff
2884 4123 d 9 h jacho /Modules/PowerSupply/LION1CELL01A/ Diff
2883 4124 d 11 h jacho /Modules/ Diff
2882 4124 d 14 h jacho /Modules/ Diff
2881 4128 d 3 h jacho /Modules/ Diff
2880 4128 d 7 h miho /Designs/LOCKTM01A/ Zárodek elektrického zámku (konstrukce pro kroužek) Diff
2879 4128 d 16 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Oprava M1 (maskování FIDU značek). Diff
2878 4132 d 15 h miho /Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/ Posunul jsem některé SMD součástky aby se nedotýkaly otvory v masce. Diff