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Rev Age Author Path Log message Diff
1751 5056 d 15 h kaklik / zaznam nalezenych chyb Diff
1745 5059 d 17 h kakl /Modules/TDC/GP201A/SW/PICinterface/ prvni verze funkcni komunikace s TDC. Zbyva doresit nastavovani registru. Diff
1744 5060 d 9 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 5061 d 10 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 5061 d 20 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 5061 d 22 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 5062 d 19 h kakl /Modules/ opravy PCB Diff
1739 5063 d 10 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 5064 d 10 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 5064 d 11 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 5064 d 13 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 5066 d 20 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 5076 d 17 h kaklik / Opravy a doplneni Diff
1717 5077 d 11 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 5077 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 5078 d 1 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 5078 d 21 h kaklik / priprava novych modulu. Diff
1712 5079 d 11 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 5079 d 11 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1708 5080 d 19 h mija /Modules/ARM/STM32F10xRxT/ Diff