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2361 4524 d 20 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ nalezeny chybejici soucastky behem osazovani. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
2360 4524 d 21 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ nalezeny chybejici soucastky behem osazovani. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.svg
2359 4524 d 22 h kaklik /Modules/ pokus o prevod do DXF. Diff
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.opj
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
2358 4525 d 2 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ pokus o export dat do DXF Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.svg
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode_polyline.dxf
2357 4525 d 3 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ exportovano v jinem formatu Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode_polyline.dxf
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.svg
2356 4525 d 4 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ aktualizace vzhledem k aktualnimu stavu. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.dxf
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.svg
2353 4525 d 5 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ uklid a vygenerovani prvniho QRcode. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.png
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPECL01A_QRcode.ps
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPEC01A_QRcode.png
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPEC01A_QRcode.ps
2352 4525 d 5 h kaklik /Modules/Translators/TTLPECL01A/DOC/QRcode/ uklid a vygenerovani prvniho QRcode. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPEC01A_QRcode.ps
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPEC01A_QRcode.png
2351 4525 d 5 h kaklik /Modules/Translators/TTLPECL01A/ uklid a vygenerovani prvniho QRcode. Diff
/Modules/Translators/TTLPECL01A/DOC/QRcode
/Modules/Translators/TTLPECL01A/DOC/QRcode/TTLPEC01A_QRcode.png
/Modules/Translators/TTLPECL01A/pdf
/Modules/Translators/TTLPECL01A/pdf/SY100ELT22L.pdf
/Modules/Translators/TTLPECL01A/pdf/SY100elt23l.pdf
/Modules/Translators/TTLPECL01A/DOC/SY100ELT22L.pdf
/Modules/Translators/TTLPECL01A/DOC/SY100elt23l.pdf
2350 4526 d 17 h kaklik / uklid Diff
/Modules/CommSerial/ETH01A/pdf
/Modules/CommSerial/ETH01A/pdf/LM5073.pdf
/Articles/Texts/Time_sync/ntpd.txt
/Articles/Texts/Time_sync/poznamky.txt
2344 4544 d 1 h kaklik /Modules/CommSerial/USB232R01B/pdf/ pridani datasheetu k FT232RL Diff
/Modules/CommSerial/USB232R01B/pdf
/Modules/CommSerial/USB232R01B/pdf/DS_FT232R.pdf
2343 4547 d 5 h mija /Modules/CommRF/ANT01/ upravena izolacni vzdalenost z 5 milsu na 6 milsu (0,152mm) Diff
/Modules/CommRF/ANT01/CAM_PROFI/BOARD.PHO
/Modules/CommRF/ANT01/CAM_PROFI/DRILL.DRL
/Modules/CommRF/ANT01/CAM_PROFI/M1.PHO
/Modules/CommRF/ANT01/CAM_PROFI/M2.PHO
/Modules/CommRF/ANT01/CAM_PROFI/T2.PHO
/Modules/CommRF/ANT01/CAM_PROFI/V1.PHO
/Modules/CommRF/ANT01/CAM_PROFI/V2.PHO
/Modules/CommRF/ANT01/PCB/ANT01.pcb
2342 4548 d 21 h kaklik /Modules/PowerSW/NFET4X01B/SCH/ aktualizace schematu modulu. Diff
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.asc
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.DSN
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.opj
2341 4549 d 20 h kaklik /Modules/PowerSW/NFET4X01B/ aktualizace modulu s vykonovymi spinaci. Diff
/Modules/PowerSW/NFET4X01B
/Modules/PowerSW/NFET4X01B/CAM_AMA
/Modules/PowerSW/NFET4X01B/CAM_DOC
/Modules/PowerSW/NFET4X01B/CAM_PROFI
/Modules/PowerSW/NFET4X01B/DOC
/Modules/PowerSW/NFET4X01B/DOC/HTML
/Modules/PowerSW/NFET4X01B/DOC/SRC
/Modules/PowerSW/NFET4X01B/PCB
/Modules/PowerSW/NFET4X01B/PrjInfo.txt
/Modules/PowerSW/NFET4X01B/SCH
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.DSN
/Modules/PowerSW/NFET4X01B/SCH/NFET4X01B.opj
/Modules/PowerSW/NFET4X01B/SW
2339 4553 d 1 h kaklik /Modules/CommRF/LNA01A/SCH/ Diff
/Modules/CommRF/LNA01A/SCH/LNA.DSN
/Modules/CommRF/LNA01A/SCH/LNA.pdf
2338 4562 d 2 h miho /Modules/CPLD_FPGA/ Opravena cesta k ikoně Diff
/Modules/CPLD_FPGA/S3AN01A/DOC/HTML/S3AN01A.cs.html
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs.html
2337 4562 d 2 h miho /Modules/CPLD_FPGA/S3AN01B/DOC/HTML/ Doplněna HTML verze dokumentace pro S3AN01B Diff
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs.html
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image001.jpg
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image002.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image003.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image004.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image005.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image006.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image007.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image008.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image009.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image010.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image011.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image012.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image013.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image014.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image015.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image016.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image017.png
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image018.jpg
/Modules/CPLD_FPGA/S3AN01B/DOC/HTML/S3AN01B_HW_Reference.cs_soubory/image019.jpg
2336 4562 d 3 h miho /Modules/CPLD_FPGA/S3AN01B/ Aktualizovaná HW dokumentace desky S3AN01B s obvodem FPGA XILINX Sparatn3AN Diff
/Modules/CPLD_FPGA/S3AN01B/DOC/S3AN01B_HW_Reference.cs.pdf
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B_HW_Reference.cs.doc
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B.cs.doc
/Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B_BOM.xls
2335 4562 d 19 h miho /Modules/CPLD_FPGA/S3AN01B/DOC/SRC/ Rozepsaná dokumentace pro FPGA desku S3AN01B Diff
/Modules/CPLD_FPGA/S3AN01B/DOC/SRC/S3AN01B.cs.doc
2328 4570 d 19 h kaklik /Modules/ zapis nalezenych chyb Diff
/Modules/CommRF/LNA01A/TODO.tx
/Modules/ARM/STM32F10xRxT/opravit.txt