Rev 3599 – ?author? – ?age? (?date?)
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Modules
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CPLD_FPGA
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S3AN01B
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HDL/
Rev 3599
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Diff
3243
4128 d 10 h
kaklik
/Modules/CPLD_FPGA/
uprava jmenne konvence projektovych slozek.
Diff
2534
4455 d 16 h
kakl
/Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/src/
Pridano generovani baliku pulzu a prepinatelna opakovaci frekvence na DOPSW. Vynulovani na TL.
Diff
2533
4455 d 17 h
kakl
/Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/
Pridano automaticke verzovani.
Diff
2528
4460 d 7 h
kakl
/Modules/CPLD_FPGA/S3AN01B/VHDL/PulseGen/
Pulzni generator.
Prvni funkcni verze.
Prekryvajici se impulzy 10ns az 2us.
Opakovaci frekvence cca 1,6kHz.
Diff
1898
4986 d 15 h
miho
/Modules/CPLD_FPGA/S3AN01B/
S3AN01B revize desky S3AN01A (s opravami)
Diff