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Modules
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CPLD_FPGA
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XILINX_XVC
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XVC_FT220X01A
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DOC/
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3178
3992 d 14 h
kaklik
/
uprava skriptu pro vyrobu qr kodu a vyroba QR kodu pro nove moduly..
Diff
/Library/DirStructure/Module/CAM_PROFI/Preview.gvp
/Modules/ARM/STM32F10xRxT01A/DOC/SRC/img/STM32F10xRxT01A_QRcode.png
/Library/Templates/PADS/DEFAULT.cam.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/CommSerial/ETH01A/CAM_PROFI/ETH01A.gvp
/Modules/CommSerial/ETH01A/pdf/LM5073.pdf
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png
/ServerPrivate/Tools/generate_QR_all.sh
/Web/About.cs.html
3108
4010 d 10 h
kaklik
/Modules/
pridani QR kodu i v dalsich adresarich.
Diff
/Modules/CPLD_FPGA/XILINX_XVC/DOC
/Modules/CPLD_FPGA/XILINX_XVC/DOC/SRC
/Modules/CPLD_FPGA/XILINX_XVC/DOC/SRC/img
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/Mechanical/Boxes/DOC
/Modules/Mechanical/Boxes/DOC/SRC
/Modules/Mechanical/Boxes/DOC/SRC/img
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/DOC
/Modules/Sensors/RGBFEE01A/DOC/SRC
/Modules/Sensors/RGBFEE01A/DOC/SRC/img
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png
2936
4072 d 11 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/
Dokončena dokumentace modulu XVC_FT220X01A (včetně HTML verze)
Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs.html
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image001.jpg
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image002.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image003.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image004.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image005.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image006.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image007.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image008.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML/XVC_FT220X01A.cs_soubory/image009.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/FT_Prog.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/FT_Prog_Description.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IMPACT_Plugin.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IMPACT_Prog.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/IdeovéSchéma.odg
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A.cs.doc
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/XVC_FT220X01A.cs.pdf
2682
4202 d 23 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/
Doplněny technologické a dokumentační výstupy XVC_FT220X01A, chybí návod, BOM a dávka pro naprogramování EEPROM.
Diff
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/DRILL.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O2.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/V1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/HTML
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A_Bot_Big.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/XVC_FT220X01A_Top_Big.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A_SCH.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Bot_Small.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/XVC_FT220X01A_Top_Small.JPG
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN
2680
4206 d 14 h
miho
/Modules/CPLD_FPGA/XILINX_XVC/
Nový modul XVC s FT220X (zatím jen design soubory). Čeká na otestování.
Diff
/Modules/CPLD_FPGA/XILINX_XVC
/Modules/CPLD_FPGA/XILINX_XVC/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/T2_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_AMA/V1_AMA.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_DOC/O1.pdf
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/BOARD.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.DRL
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/DRILL.rep
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/M1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/P1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/T2.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/CAM_PROFI/V1.PHO
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PCB/XVC_FT220X01A.pcb
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/PrjInfo.txt
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.ASC
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/SCH/XVC_FT220X01A.DSN