Rev Age Author Path Log message Diff Changes
3490 3919 d 11 h miho / Doplněna dokumentace firmwaru USBasp pro modul AVRUSB01, drobné opravy Diff
/Modules/AVR/AVRUSB01A/DOC/FW_USBasp.cs.pdf
/Modules/AVR/AVRUSB01A/DOC/HTML/AVRUSB01A.cs.html
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp.cs.html
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp_soubory
/Modules/AVR/AVRUSB01A/DOC/HTML/FW_USBasp_soubory/image001.jpg
/Modules/AVR/AVRUSB01A/DOC/SRC/FW_USBasp.cs.doc
/Modules/Clock/CLK1PLL01A/pdf/cdce913.pdf
/Modules/AVR/AVRUSB01A/DOC/HTML/AVRUSB01A.cs.htm
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf
/Modules/AVR/AVRUSB01A/SW/fw_usbasp/Makefile
/Web/CSS/MLAB.css
3445 3951 d 14 h kaklik / zlepseni dokumentace modulu. Diff
/Modules/ADconverters/ACOMP01A/DOC/SRC/img
/Modules/ADconverters/ACOMP01A/DOC/SRC/img/ACOMP01A_QRcode.png
/Modules/ADconverters/ADCdual01A/DOC/SRC/img
/Modules/ADconverters/ADCdual01A/DOC/SRC/img/ADCdual01A_QRcode.png
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img
/Modules/CPLD_FPGA/S6AN01A/DOC/SRC/img/S6AN01A_QRcode.png
/Modules/Clock/CLK1PLL01A/DOC/SRC
/Modules/Clock/CLK1PLL01A/DOC/SRC/img
/Modules/Clock/CLK1PLL01A/DOC/SRC/img/CLK1PLL01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/CLKDIV01A.cs.pdf
/Modules/Clock/CLKDIV01A/DOC/SRC/img
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_QRcode.png
/Modules/Clock/CLKDIV01A/DOC/SRC/img/CLKDIV01A_Top_Big.jpg
/Modules/CommRF/FORX01A/DOC/SRC/img
/Modules/CommRF/FORX01A/DOC/SRC/img/FORX01A_QRcode.png
/Modules/CommRF/FOTX01A/DOC/SRC/img
/Modules/CommRF/FOTX01A/DOC/SRC/img/FOTX01A_QRcode.png
/Modules/CommSerial/USBI2C01A/DOC/SRC/img
/Modules/CommSerial/USBI2C01A/DOC/SRC/img/USBI2C01A_QRcode.png
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/img/USBIO01A_Top_Big.jpg
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04A/DOC/SRC/img/BATPOWER04A_QRcode.png
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img
/Modules/PowerSupply/BATPOWER04B/DOC/SRC/img/BATPOWER04B_QRcode.png
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img
/Modules/PowerSupply/CHPUMP01A/DOC/SRC/img/CHPUMP01A_QRcode.png
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img
/Modules/PowerSupply/TPS63060V01A/DOC/SRC/img/TPS63060V01A_QRcode.png
/Modules/Sensors/RPS01A/DOC/SRC/img
/Modules/Sensors/RPS01A/DOC/SRC/img/RPS01A_QRcode.png
/Modules/Universal/UNISERIAL01A/DOC/SRC/img
/Modules/Universal/UNISERIAL01A/DOC/SRC/img/UNISERIAL01A_QRcode.png
/Modules/Clock/CLKDIV01A/SW
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Bottom_Big.jpg
/Modules/CommSerial/USBIO01A/DOC/SRC/USBIO01A_Top_Big.jpg
/Designs/HAM Constructions/SDRX01B/DOC/SDRX01B.cs.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X01A/DOC/SRC/img/XVC_FT220X01A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_FT220X02A/DOC/SRC/img/XVC_FT220X02A_QRcode.png
/Modules/CPLD_FPGA/XILINX_XVC/XVC_SOFTWARE/DOC/SRC/img/XVC_SOFTWARE_QRcode.png
/Modules/Clock/CLKDIV01A/PrjInfo.txt
/Modules/Measuring/GPS01A/TODO.txt
/Modules/Mechanical/Boxes/UNIBOX01A/DOC/SRC/img/UNIBOX01A_QRcode.png
/Modules/Sensors/RGBFEE01A/RGBHD01A/DOC/SRC/img/RGBHD01A_QRcode.png
3431 3956 d 12 h miho /Modules/Clock/CLK1PLL01A/SCH/ Diff
/Modules/Clock/CLK1PLL01A/SCH/!____!.txt
3430 3956 d 13 h miho /Modules/Clock/CLK1PLL01A/SCH/ Doplněn komentář. Diff
/Modules/Clock/CLK1PLL01A/SCH/!____!.txt
3429 3956 d 15 h miho /Modules/Clock/CLK1PLL01A/ Dogenerované PDF soubory Diff
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf
3428 3956 d 20 h miho /Modules/Clock/CLK1PLL01A/ Opraven SCH a PCB CLK1PLL01A (oprava EN vývodů u stabilizátorů), nutno ještě přegenerovat PDF výstupy od plošného spoje (zde PDF995 generuje velmi nekvalitní výstupy, nutno použít něco funkčnějšího). Diff
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf
3427 3958 d 16 h kaklik / vylepseni dokumentace studie prijimace Diff
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_test_setup.png
/Modules/Clock/CLK1PLL01A/pdf
/Modules/Clock/CLK1PLL01A/pdf/scas849e.pdf
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.dia
/Designs/Measuring_instruments/GNSS01A/DOC/SRC/GNSS_SDR.png
3424 3960 d 10 h miho /Modules/Clock/CLK1PLL01A/ Hodinový PLL generátor s obvodem TI CDCE913 (schema, PCB a technologické výstupy). Diff
/Modules/Clock/CLK1PLL01A
/Modules/Clock/CLK1PLL01A/CAM_AMA
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/T1_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA.pdf
/Modules/Clock/CLK1PLL01A/CAM_AMA/V2_AMA_MULTI.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC
/Modules/Clock/CLK1PLL01A/CAM_DOC/DRILL.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O1.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/O2.pdf
/Modules/Clock/CLK1PLL01A/CAM_DOC/V2.pdf
/Modules/Clock/CLK1PLL01A/CAM_PROFI
/Modules/Clock/CLK1PLL01A/CAM_PROFI/BOARD.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.DRL
/Modules/Clock/CLK1PLL01A/CAM_PROFI/DRILL.rep
/Modules/Clock/CLK1PLL01A/CAM_PROFI/M2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/P2.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/T1.PHO
/Modules/Clock/CLK1PLL01A/CAM_PROFI/V2.PHO
/Modules/Clock/CLK1PLL01A/DOC
/Modules/Clock/CLK1PLL01A/PCB
/Modules/Clock/CLK1PLL01A/PCB/CLK1PLL01A.pcb
/Modules/Clock/CLK1PLL01A/PrjInfo.txt
/Modules/Clock/CLK1PLL01A/SCH
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.ASC
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A.DSN
/Modules/Clock/CLK1PLL01A/SCH/CLK1PLL01A_SCH.pdf