3592 |
3804 d 19 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
Opraveno oznaceni 1 u integrovaneh oobvodu. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/O2.pdf /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3509 |
3831 d 14 h |
kaklik |
/Modules/ |
pregenerovani dokumentace. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/O1.pdf /Modules/Clock/CLKDIV01A/CAM_DOC/O2.pdf /Modules/Sensors/IUC01A/CAM_DOC/O1.pdf /Modules/Sensors/IUC01A/CAM_DOC/O2.pdf /Modules/Sensors/IUC01A/CAM_DOC/V2.pdf |
/Modules/ADconverters/ADCmonoSPI01B/CAM_DOC/O1.pdf /Modules/ADconverters/ADCmonoSPI01B/CAM_DOC/O2.pdf /Modules/ADconverters/ADCmonoSPI01B/PCB/ADCMONOSPI.pcb /Modules/ADconverters/ADCmonoSPI01B/SCH/ADCmonoSPI01B.pdf /Modules/CPLD_FPGA/S3AN01B/SCH/S3AN01B.DSN /Modules/Clock/CLKDIV01A/CAM_DOC/DRILL.pdf /Modules/Clock/CLKDIV01A/CAM_DOC/V1.pdf /Modules/Clock/CLKDIV01A/CAM_DOC/V2.pdf /Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/TODO.txt /Modules/Sensors/IUC01A/CAM_DOC/V1.pdf /Modules/Sensors/IUC01A/PCB/IUC01.pcb |
|
3404 |
3908 d 6 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
vygenerovani nahledu. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_DOC/DRILL.pdf /Modules/Clock/CLKDIV01A/CAM_DOC/V1.pdf /Modules/Clock/CLKDIV01A/CAM_DOC/V2.pdf |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3403 |
3908 d 6 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
oprava chyb z TODO. |
Diff |
/Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL /Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO /Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3396 |
3908 d 12 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
vygenerovanitechnologickych vystupu |
Diff |
/Modules/Clock/CLKDIV01A/CAM_PROFI/BOARD.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/DRILL.DRL /Modules/Clock/CLKDIV01A/CAM_PROFI/M1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/M2.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/T1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V1.PHO /Modules/Clock/CLKDIV01A/CAM_PROFI/V2.PHO |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3395 |
3908 d 13 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
|
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN /Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc |
|
3394 |
3908 d 14 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
ulozeni verze pred otocenim konektoru. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN |
|
3393 |
3908 d 14 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
zapojeni diff paru. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3392 |
3908 d 14 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
|
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3391 |
3908 d 15 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
prvni slusne zapojeni diferencialnich paru. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3389 |
3908 d 16 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
otoceni a srovnani konektoru |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3388 |
3908 d 16 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
|
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN /Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj |
|
3387 |
3908 d 17 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
|
Diff |
/Modules/Clock/CLKDIV01A/SCH/clkdiv.pdf |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN /Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc /Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj |
|
3385 |
3909 d 12 h |
kaklik |
/Modules/Clock/CLKDIV01A/PCB/ |
zkouska zaroutovatelnosti. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb |
|
3384 |
3909 d 12 h |
kaklik |
/Modules/Clock/CLKDIV01A/ |
prvni schema a plosny spoj modulu delicky. |
Diff |
/Modules/Clock/CLKDIV01A/PCB/CLKDIV.pcb /Modules/Clock/CLKDIV01A/SCH/CLKDIV.DSN /Modules/Clock/CLKDIV01A/SCH/CLKDIV.asc /Modules/Clock/CLKDIV01A/SCH/CLKDIV.opj |
|
3383 |
3909 d 15 h |
kaklik |
/Modules/ |
zalozeni noveho modulu pro delicku hodin. |
Diff |
/Modules/CPLD_FPGA/S6AN01A/SCH/navrh.PDF /Modules/Clock/CLKDIV01A /Modules/Clock/CLKDIV01A/CAM_AMA /Modules/Clock/CLKDIV01A/CAM_DOC /Modules/Clock/CLKDIV01A/CAM_PROFI /Modules/Clock/CLKDIV01A/CAM_PROFI/Preview.gvp /Modules/Clock/CLKDIV01A/DOC /Modules/Clock/CLKDIV01A/DOC/HTML /Modules/Clock/CLKDIV01A/DOC/SRC /Modules/Clock/CLKDIV01A/PCB /Modules/Clock/CLKDIV01A/PrjInfo.txt /Modules/Clock/CLKDIV01A/SCH /Modules/Clock/CLKDIV01A/SCH/navrh.PDF /Modules/Clock/CLKDIV01A/SW /Modules/Clock/CLKDIV01A/pdf /Modules/Clock/CLKDIV01A/pdf/sy100s834-l.pdf |
|