←Prev12Next→ Show All
Rev Age Author Path Log message Diff
1572 5046 d 16 h kaklik / poznamky problemu Diff
1555 5075 d 0 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5085 d 12 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5085 d 13 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5088 d 9 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5088 d 11 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5089 d 12 h kaklik / Diff
1543 5089 d 12 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5089 d 13 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5090 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5090 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5090 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5107 d 2 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5107 d 9 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff
1529 5107 d 10 h kaklik /Modules/Clock/CLKGEN01A/ Vpodstate hotovy tistak, jeste bude pokus s otocenim konektoru. Diff
1528 5107 d 12 h kaklik /Modules/ Diff
1527 5107 d 13 h kaklik /Modules/Clock/CLKGEN01A/SCH/ pridani zapomenutych der a fidu znacek Diff
1526 5108 d 3 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1525 5108 d 4 h kaklik /Modules/Clock/CLKGEN01A/PCB/ zacatek prace na plosnem spoji. Diff
1524 5108 d 8 h kaklik /Modules/Clock/CLKGEN01A/SCH/ export dat pro PADs. Diff