←Prev12Next→ Show All
Rev Age Author Path Log message Diff
3106 4156 d 1 h kaklik / vygenerovani QR kodu v modulech, ktere maji existujici soubor PrjInfo.txt Diff
1715 5090 d 7 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1691 5118 d 4 h kaklik / Fifmware zeditovan tak, aby nepotreboval bootloader. Diff
1668 5131 d 1 h kaklik /Modules/ nove moduly Diff
1666 5136 d 13 h kaklik /Modules/ Zalozeni noveho typu modulu pro Time to Digital conversion Diff
1661 5146 d 2 h kaklik /Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. Diff
1572 5208 d 16 h kaklik / poznamky problemu Diff
1555 5237 d 0 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5247 d 12 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5247 d 12 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5250 d 9 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5250 d 10 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5251 d 11 h kaklik / Diff
1543 5251 d 12 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5251 d 13 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5252 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5252 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5252 d 2 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5269 d 1 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5269 d 9 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff