←Prev12Next→ Show All
Rev Age Author Path Log message Diff
3106 3983 d 13 h kaklik / vygenerovani QR kodu v modulech, ktere maji existujici soubor PrjInfo.txt Diff
1715 4917 d 19 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1691 4945 d 16 h kaklik / Fifmware zeditovan tak, aby nepotreboval bootloader. Diff
1668 4958 d 13 h kaklik /Modules/ nove moduly Diff
1666 4964 d 1 h kaklik /Modules/ Zalozeni noveho typu modulu pro Time to Digital conversion Diff
1661 4973 d 15 h kaklik /Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. Diff
1572 5036 d 4 h kaklik / poznamky problemu Diff
1555 5064 d 12 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5075 d 0 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5075 d 0 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5077 d 21 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5077 d 22 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5078 d 23 h kaklik / Diff
1543 5079 d 0 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5079 d 1 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5079 d 14 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5079 d 14 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5079 d 14 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5096 d 14 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5096 d 21 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff