←Prev12Next→ Show All
Rev Age Author Path Log message Diff
3106 4158 d 9 h kaklik / vygenerovani QR kodu v modulech, ktere maji existujici soubor PrjInfo.txt Diff
1715 5092 d 15 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1691 5120 d 12 h kaklik / Fifmware zeditovan tak, aby nepotreboval bootloader. Diff
1668 5133 d 9 h kaklik /Modules/ nove moduly Diff
1666 5138 d 21 h kaklik /Modules/ Zalozeni noveho typu modulu pro Time to Digital conversion Diff
1661 5148 d 10 h kaklik /Modules/Clock/CLKGEN01A/SW/DG8SAQ synthesiser_Emulator/ do MLABu naportovan program pro ovladani kmitoctove syntezy z pocitace. Diff
1572 5211 d 0 h kaklik / poznamky problemu Diff
1555 5239 d 8 h kaklik /Modules/Clock/ pokus s ladenim delky spoju Diff
1548 5249 d 20 h kaklik /Modules/Clock/ aktualizace popisu modulů. Diff
1547 5249 d 20 h kaklik /Modules/Clock/CLKGEN01A/ Fotky LO. Diff
1546 5252 d 17 h kaklik /Modules/Clock/CLKGEN01A/ seznam chyb. Diff
1545 5252 d 18 h kaklik /Modules/Clock/CLKGEN01A/ potisk Diff
1544 5253 d 19 h kaklik / Diff
1543 5253 d 20 h kaklik /Modules/Clock/CLKGEN01A/ vymena CAM vystupu Diff
1542 5253 d 21 h kaklik /Modules/Clock/CLKGEN01A/ generovani technologickych dat. Diff
1541 5254 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1540 5254 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1539 5254 d 10 h kaklik /Modules/Clock/CLKGEN01A/PCB/ Diff
1531 5271 d 10 h kaklik /Modules/Clock/CLKGEN01A/ pridani chybejicich terminacnich odporu.. Diff
1530 5271 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Temer konecna verze PCB pro Si570. Respektive Si5XX Diff