Rev Age Author Path Log message Diff
1871 5016 d 19 h kaklik /Modules/CommSerial/ETH01A/ vygenerovani zakladni obrazkove dokumentace. Diff
1855 5020 d 19 h kaklik /Modules/CommSerial/ETH01A/PCB/ Dokončena hlavní část návrhu PCB. Diff
1851 5021 d 20 h kaklik /Modules/CommSerial/ETH01A/ pokracovani v navrhu PCB pro ethernet. Diff
1850 5021 d 21 h kaklik /Modules/CommSerial/ETH01A/PCB/ Diff
1849 5021 d 22 h kaklik /Modules/CommSerial/ETH01A/PCB/ pokracovani v navrhu PCB pro ethernet. Diff
1848 5021 d 23 h kaklik /Modules/CommSerial/ETH01A/ vyreseno krizeni spoju Diff
1847 5021 d 23 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1846 5022 d 0 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1845 5022 d 0 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1844 5022 d 1 h kaklik /Modules/ Diff
1843 5022 d 2 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1842 5022 d 2 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1795 5048 d 18 h kaklik /Modules/CommSerial/ETH01A/ zacatek navrhu PCB. Diff