Rev Age Author Path Log message Diff
1871 4867 d 7 h kaklik /Modules/CommSerial/ETH01A/ vygenerovani zakladni obrazkove dokumentace. Diff
1855 4871 d 7 h kaklik /Modules/CommSerial/ETH01A/PCB/ Dokončena hlavní část návrhu PCB. Diff
1851 4872 d 8 h kaklik /Modules/CommSerial/ETH01A/ pokracovani v navrhu PCB pro ethernet. Diff
1850 4872 d 9 h kaklik /Modules/CommSerial/ETH01A/PCB/ Diff
1849 4872 d 10 h kaklik /Modules/CommSerial/ETH01A/PCB/ pokracovani v navrhu PCB pro ethernet. Diff
1848 4872 d 11 h kaklik /Modules/CommSerial/ETH01A/ vyreseno krizeni spoju Diff
1847 4872 d 11 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1846 4872 d 12 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1845 4872 d 13 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1844 4872 d 13 h kaklik /Modules/ Diff
1843 4872 d 14 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1842 4872 d 14 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1795 4899 d 7 h kaklik /Modules/CommSerial/ETH01A/ zacatek navrhu PCB. Diff