Rev Age Author Path Log message Diff Changes
2175 4674 d 5 h kaklik /Modules/Translators/TTLPECL01A/ vygenerovani obrazku plosneho spoje. Diff
/Modules/Translators/TTLPECL01A/CAM_DOC/PCB.png
/Modules/Translators/TTLPECL01A/CAM_PROFI/V1.PHO
2173 4674 d 5 h kaklik /Modules/Translators/TTLPECL01A/ pridani terminacnich odporu na PECL stranu. Diff
/Modules/Translators/TTLPECL01A/CAM_PROFI/DRILL.DRL
/Modules/Translators/TTLPECL01A/CAM_PROFI/M2.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/T1.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/V2.PHO
/Modules/Translators/TTLPECL01A/PCB/TTLPECL.pcb
/Modules/Translators/TTLPECL01A/PCB/TTLPECL.pdf
/Modules/Translators/TTLPECL01A/SCH/TTLPECL.DSN
/Modules/Translators/TTLPECL01A/SCH/TTLPECL.opj
1786 4908 d 3 h kaklik /Modules/Translators/TTLPECL01A/ vygenerovani technologickych vystupu Diff
/Modules/Translators/TTLPECL01A/CAM_PROFI/BOARD.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/DRILL.DRL
/Modules/Translators/TTLPECL01A/CAM_PROFI/M2.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/T1.PHO
/Modules/Translators/TTLPECL01A/CAM_PROFI/V2.PHO
/Modules/Translators/TTLPECL01A/PCB/TTLPECL.pcb
1781 4908 d 10 h kaklik / Zalozena nоvá třída modulů pro převod signálových úrovní. Diff
/Library/DirStructure/DirInfo.txt
/Modules/Translators
/Modules/Translators/DirInfo.txt
/Modules/Translators/TTLPECL01A
/Modules/Translators/TTLPECL01A/CAM_AMA
/Modules/Translators/TTLPECL01A/CAM_DOC
/Modules/Translators/TTLPECL01A/CAM_PROFI
/Modules/Translators/TTLPECL01A/DOC
/Modules/Translators/TTLPECL01A/DOC/HTML
/Modules/Translators/TTLPECL01A/DOC/SRC
/Modules/Translators/TTLPECL01A/PCB
/Modules/Translators/TTLPECL01A/PrjInfo.txt
/Modules/Translators/TTLPECL01A/SCH
/Modules/Translators/TTLPECL01A/SW
/Modules/Translators/TXB0108_Small.jpg