Rev Age Author Path Log message Diff Changes
3699 3736 d 18 h kakl /Designs/duckweed_collector/DOC/ Pridan navod na regulator. Diff
/Designs/duckweed_collector/DOC/Turborix_AE_BrushlessMotorController.pdf
3690 3775 d 17 h kaklik / presunuti zdrojaku ke generatoru pulzu. Diff
/Designs/Laser_pulser/HDL
/Modules/CPLD_FPGA/S3AN01B/HDL
3680 3785 d 7 h kaklik /Designs/Measuring_instruments/RMDS02C/SCH/ oprava chyby v blokovem schema. Diff
/Designs/Measuring_instruments/RMDS02C/SCH/RMDS02C_system.dia
/Designs/Measuring_instruments/RMDS02C/SCH/RMDS02C_system.png
3679 3798 d 20 h kaklik /Designs/Measuring_instruments/AWS01B/SCH/ pridani schema sensoru smeru vetru meteostanice. Diff
/Designs/Measuring_instruments/AWS01B/SCH
/Designs/Measuring_instruments/AWS01B/SCH/WHP0024A1-cache.lib
/Designs/Measuring_instruments/AWS01B/SCH/WHP0024A1.pdf
/Designs/Measuring_instruments/AWS01B/SCH/WHP0024A1.pro
/Designs/Measuring_instruments/AWS01B/SCH/WHP0024A1.sch
3675 3807 d 19 h kaklik /Designs/Tools/ aprava chyby v nazvu. Diff
/Designs/Tools/AudioInterface01A
/Designs/Tools/AudioInterface1A
3672 3807 d 19 h kaklik / pridani dalsi dakumentace. Diff
/Designs/Tools/AudioInterface1A
/Designs/Tools/AudioInterface1A/AudioInterface_prototype_Small.JPG
/Designs/Tools/AudioInterface1A/DOC
/Designs/Tools/AudioInterface1A/DOC/HTML
/Designs/Tools/AudioInterface1A/DOC/SRC
/Designs/Tools/AudioInterface1A/DOC/SRC/img
/Designs/Tools/AudioInterface1A/DOC/SRC/img/AudioInterface01A_SDRX01B.JPG
/Designs/Tools/AudioInterface1A/DOC/SRC/img/AudioInterface_prototype.JPG
/Designs/Tools/AudioInterface1A/PrjInfo.txt
/Designs/Tools/AudioInterface1A/SCH
/Designs/Tools/AudioInterface1A/SW
/Modules/Audio/ADCaudio01A/ADCaudio01A_Bottom_Small.JPG
/Modules/Audio/ADCaudio01A/DOC/SRC/img/ADCaudio01A_Bottom.JPG
/Modules/CommSerial/USBI2S01A/DOC/SRC/img/USBI2S01A_Bottom_Big.JPG
/Modules/CommSerial/USBI2S01A/DOC/SRC/img/USBI2S01A_Connection_Bottom_Big.JPG
/Modules/CommSerial/USBI2S01A/USBI2S01A_Bottom_Small.JPG
/Modules/Audio/ADCaudio01A/PrjInfo.txt
/Modules/CommSerial/USBI2S01A/PrjInfo.txt
3670 3810 d 16 h kakl /Designs/Spectrograph/SW/colores/python/ rename setcol.py Diff
/Designs/Spectrograph/SW/colores/python/rts2-sensor-setcol.py
/Designs/Spectrograph/SW/colores/python/setcol.py
3669 3811 d 6 h kakl /Designs/Spectrograph/SW/colores/ Added initiating script fot COLORES. Diff
/Designs/Spectrograph/SW/colores/python
/Designs/Spectrograph/SW/colores/python/setcol.py
/Designs/Spectrograph/SW/colores/colores.ino
3666 3820 d 7 h kaklik /Designs/ROBOTS/SSP01A/ I2C motor driver Diff
/Designs/ROBOTS/SSP01A
/Designs/ROBOTS/SSP01A/SW
/Designs/ROBOTS/SSP01A/SW/PIC18F4550
/Designs/ROBOTS/SSP01A/SW/PIC18F4550/main.c
/Designs/ROBOTS/SSP01A/SW/PIC18F4550/main.h
/Designs/ROBOTS/SSP01A/SW/PIC18F4550/main.hex
3656 3824 d 7 h kaklik / vylepseni dokumentace. Diff
/Designs/Measuring_instruments/ACOUNTER01A/PrjInfo.txt
/Designs/Measuring_instruments/ACOUNTER02A/PrjInfo.txt
/Modules/Sensors/IMU01A/SW/PIC16F887/MMA8451Q.h
/Modules/Sensors/IMU01A/SW/Python/.ipynb_checkpoints/IMU_test-checkpoint.ipynb
/Modules/Sensors/IMU01A/SW/Python/IMU_test.ipynb
3654 3826 d 11 h kakl /Designs/Spectrograph/SW/lamp/ Slight change off help. Diff
/Designs/Spectrograph/SW/lamp/lamp.ino
3653 3826 d 11 h kakl /Designs/Spectrograph/SW/lamp/ Changed help. Diff
/Designs/Spectrograph/SW/lamp/lamp.ino
3652 3826 d 11 h kakl /Designs/Spectrograph/SW/lamp/ New changed telemetry. Diff
/Designs/Spectrograph/SW/lamp/lamp.ino
3651 3826 d 22 h kakl /Designs/Spectrograph/SW/lamp/ Added saving triacs states to EEPROM Diff
/Designs/Spectrograph/SW/lamp/lamp.ino
3650 3827 d 14 h kaklik /Designs/Measuring_instruments/RMDS02C/SW/Host_controller/ fixed Diff
/Designs/Measuring_instruments/RMDS02C/SW/Host_controller/setSi570.py
3649 3829 d 9 h kaklik /Designs/Measuring_instruments/VMDS01A/ zlepšení dokumentace. Diff
/Designs/Measuring_instruments/VMDS01A/DOC/SRC/img/VMDS_Camera_Big.jpg
/Designs/Measuring_instruments/VMDS01A/VMDS_Camera_Small.jpg
/Designs/Measuring_instruments/VMDS01A/PrjInfo.txt
3647 3830 d 5 h kaklik /Designs/ Pradani fotografii a nahravacich skriptu. Diff
/Designs/Laboratory_instruments/GPSDO01A/DOC
/Designs/Laboratory_instruments/GPSDO01A/DOC/SRC
/Designs/Laboratory_instruments/GPSDO01A/DOC/SRC/img
/Designs/Laboratory_instruments/GPSDO01A/DOC/SRC/img/GPSDO_ARM_FPG_old.JPG
/Designs/Measuring_instruments/RMDS02B/DOC
/Designs/Measuring_instruments/RMDS02B/DOC/SRC
/Designs/Measuring_instruments/RMDS02B/DOC/SRC/img
/Designs/Measuring_instruments/RMDS02B/DOC/SRC/img/RMDS002B_Top_Big.JPG
/Designs/Measuring_instruments/RMDS02B/RMDS002B_Top_Small.JPG
/Designs/Measuring_instruments/RMDS02C/SW/Host_controller/SDR_Record_jack.sh
/Designs/Measuring_instruments/RMDS02C/SW/Host_controller/SDR_record_alsa.sh
3646 3832 d 12 h kaklik /Designs/Measuring_instruments/RMDS02C/SW/Host_controller/ pridani zaznamoveho skriptu
z toutatise.
Diff
/Designs/Measuring_instruments/RMDS02C/SW/Host_controller/SDR_record.sh
3643 3835 d 19 h kaklik / zarozena nova dokumentacni slozka pro modul urceny symetrizaci signalu. Diff
/Modules/CommRF/SMA2SATA01A
/Modules/CommRF/SMA2SATA01A/CAM_AMA
/Modules/CommRF/SMA2SATA01A/CAM_DOC
/Modules/CommRF/SMA2SATA01A/CAM_PROFI
/Modules/CommRF/SMA2SATA01A/CAM_PROFI/Preview.gvp
/Modules/CommRF/SMA2SATA01A/DOC
/Modules/CommRF/SMA2SATA01A/DOC/HTML
/Modules/CommRF/SMA2SATA01A/DOC/SRC
/Modules/CommRF/SMA2SATA01A/PrjInfo.txt
/Modules/CommRF/SMA2SATA01A/SCH_PCB
/Modules/CommRF/SMA2SATA01A/SCH_PCB/SMA2SATA.pro
/Modules/CommRF/SMA2SATA01A/SW
/Modules/CommRF/SMA2SATA01A/pdf
/Designs/HAM Constructions/SDRX02B/HDL/README.txt
/Modules/Measuring/GPS01A/TODO.txt
3641 3839 d 16 h kaklik /Designs/HAM Constructions/SDRX02B/HDL/ Pridani HDL zdrojovych kodu. Diff
/Designs/HAM Constructions/SDRX02B/HDL
/Designs/HAM Constructions/SDRX02B/HDL/README.txt
/Designs/HAM Constructions/SDRX02B/HDL/modules
/Designs/HAM Constructions/SDRX02B/HDL/modules/comm
/Designs/HAM Constructions/SDRX02B/HDL/modules/comm/spi_master_transmit.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/clk_125MHz_to_6MHz.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512_dualclk_fwft.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/core_generator_ml605/fifo_32x512_walmostfull.xco
/Designs/HAM Constructions/SDRX02B/HDL/modules/fifo_related
/Designs/HAM Constructions/SDRX02B/HDL/modules/fifo_related/fifo_to_enable.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/information
/Designs/HAM Constructions/SDRX02B/HDL/modules/information/information_block.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/clock_divider.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/up_counter.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/sychro1/up_counter_stdlv.vhd
/Designs/HAM Constructions/SDRX02B/HDL/modules/xilly
/Designs/HAM Constructions/SDRX02B/HDL/modules/xilly/xilly_userlogiccmp_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src
/Designs/HAM Constructions/SDRX02B/HDL/project_src/bitslip_compensation.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/glue_data.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/information_data.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/iserdes_clock_generator.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/kakona_package.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/lo_divider_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/multiplexer_from_fifos.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/myserdes_ddr.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/myserdes_ddr_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/processing_block.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/saw_generator_wrapper.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/spi_transmitter_wrapper2.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/swap_endianness.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/userlogiccmp_template.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xilly
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xilly/xilly_toplevel.userlogiccmp_kakona.vhd
/Designs/HAM Constructions/SDRX02B/HDL/project_src/xillybus_ml605_kakona.ucf