Rev Age Author Path Log message Diff
1751 4927 d 1 h kaklik / zaznam nalezenych chyb Diff
1745 4930 d 2 h kakl /Modules/TDC/GP201A/SW/PICinterface/ prvni verze funkcni komunikace s TDC. Zbyva doresit nastavovani registru. Diff
1744 4930 d 19 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 4931 d 19 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 4932 d 6 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 4932 d 8 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 4933 d 4 h kakl /Modules/ opravy PCB Diff
1739 4933 d 20 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 4934 d 20 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 4934 d 21 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 4934 d 22 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 4937 d 5 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 4947 d 2 h kaklik / Opravy a doplneni Diff
1717 4947 d 21 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 4948 d 3 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 4948 d 11 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 4949 d 6 h kaklik / priprava novych modulu. Diff
1712 4949 d 20 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 4949 d 20 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1708 4951 d 4 h mija /Modules/ARM/STM32F10xRxT/ Diff